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c66f5620e6
This is control board on Bitmain Antminer S9. There are 3 board variables with 256MB, 512MB and 1024MB DDR. DDR memory is automatically detected with using get_with using get_ram_size(). Bitmain is using 16MB space for FPGA which is handled via reserved-memory. Also U-Boot is allocating 16B for storing bootcounts. Watchdog is started but never service in U-Boot. SPL MMC is working. SPL NAND is not working because it is not supported as of now. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
3 lines
73 B
C
3 lines
73 B
C
// SPDX-License-Identifier: GPL-2.0
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#include "../../xilinx/zynq/board.c"
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