Jagan Teki ed77ce728a ram: rk3399: Add ddrtimingC0 ... Add DdrTimingC0 structure with associated bit fields. These would help to reconfigure sdram capabilities during lpddr4 setup related configs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>		2019-07-20 23:59:44 +08:00
..
mediatek	ram: MediaTek: add DDR3 driver for MT7629 SoC	2018-11-28 23:04:53 -05:00
rockchip	ram: rk3399: Add ddrtimingC0	2019-07-20 23:59:44 +08:00
stm32mp1	ram: stm32mp1_ram: Fix warnings when compiling with W=1	2019-07-12 11:50:56 +02:00
bmips_ram.c	ram: bmips: Remove DM_FLAG_PRE_RELOC flag	2018-11-14 09:16:28 -08:00
k3-am654-ddrss.c	ram: Introduce K3 AM654 DDR Sub System driver	2018-11-16 16:51:58 -05:00
k3-am654-ddrss.h	ram: Introduce K3 AM654 DDR Sub System driver	2018-11-16 16:51:58 -05:00
Kconfig	ram: rockchip: Add initial Kconfig	2019-07-19 11:11:09 +08:00
Makefile	ram: MediaTek: add DDR3 driver for MT7629 SoC	2018-11-28 23:04:53 -05:00
mpc83xx_sdram.c	mpc83xx: Introduce ARCH_MPC837X	2019-05-20 13:50:34 +02:00
ram-uclass.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
sandbox_ram.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
stm32_sdram.c	ram: stm32_sdram: Adds stm32f429-disco fixes for HardFault at booting	2018-05-26 18:19:17 -04:00