u-boot/doc/README.nios_CFG_NIOS_CPU
wdenk c935d3bd8b Patches by Stephan Linz, 11 Dec 2003:
- more documentation for NIOS port
- new struct nios_pio_t, struct nios_spi_t
- Reconfiguration for NIOS Development Kit DK1C20:
  o move board related code from board/dk1c20
    to board/altera/dk1c20
  o create a new common source path board/altera/common
    and move generic flash access stuff into it
  o change/expand configuration file DK1C20.h
- Add support for NIOS Development Kit DK1S10
- Add status LED support for NIOS systems
- Add dual 7-segment LED support for Altera NIOS DevKits
2004-01-03 19:43:48 +00:00

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===============================================================================
C F G _ N I O S _ C P U _ * v s . N I O S S D K
===============================================================================
When ever you have to make a new NIOS CPU configuration you can use this table
as a reference list to the original NIOS SDK symbols made by Alteras SOPC
Builder. Look into excalibur.h and excalibur.s in your SDK path cpu_sdk/inc.
Symbols beginning with a '[ptf]:' are coming from your SOPC sytem description
(PTF file) in sections WIZARD_SCRIPT_ARGUMENTS or SYSTEM_BUILDER_INFO.
C O R E N I O S S D K [1],[7]
-------------------------------------------------------------------------------
CFG_NIOS_CPU_CLK nasys_clock_freq
CFG_NIOS_CPU_ICACHE nasys_icache_size
CFG_NIOS_CPU_DCACHE nasys_dcache_size
CFG_NIOS_CPU_REG_NUMS nasys_nios_num_regs
CFG_NIOS_CPU_MUL __nios_use_multiply__
CFG_NIOS_CPU_MSTEP __nios_use_mstep__
CFG_NIOS_CPU_STACK nasys_stack_top
CFG_NIOS_CPU_VEC_BASE nasys_vector_table
CFG_NIOS_CPU_VEC_SIZE nasys_vector_table_size
CFG_NIOS_CPU_VEC_NUMS
CFG_NIOS_CPU_RST_VECT nasys_reset_address
CFG_NIOS_CPU_DBG_CORE nasys_debug_core
CFG_NIOS_CPU_RAM_BASE na_onchip_ram_64_kbytes
CFG_NIOS_CPU_RAM_SIZE na_onchip_ram_64_kbytes_size
CFG_NIOS_CPU_ROM_BASE na_boot_monitor_rom
CFG_NIOS_CPU_ROM_SIZE na_boot_monitor_rom_size
CFG_NIOS_CPU_OCI_BASE nasys_oci_core
CFG_NIOS_CPU_OCI_SIZE
CFG_NIOS_CPU_SRAM_BASE na_ext_ram nasys_program_mem
nasys_data_mem
CFG_NIOS_CPU_SRAM_SIZE na_ext_ram_size nasys_program_mem_size
nasys_data_mem_size
CFG_NIOS_CPU_SDRAM_BASE na_sdram
CFG_NIOS_CPU_SDRAM_SIZE na_sdram_size
CFG_NIOS_CPU_FLASH_BASE na_ext_flash nasys_main_flash
nasys_am29lv065d_flash_0
nasys_flash_0
CFG_NIOS_CPU_FLASH_SIZE na_ext_flash_size nasys_main_flash_size
T I M E R N I O S S D K [3]
-------------------------------------------------------------------------------
CFG_NIOS_CPU_TIMER_NUMS nasys_timer_count
CFG_NIOS_CPU_TIMER[0-9] nasys_timer_[0-9]
CFG_NIOS_CPU_TIMER[0-9]_IRQ nasys_timer_[0-9]_irq
CFG_NIOS_CPU_TIMER[0-9]_PER [ptf]:period
[ptf]:period_units
[ptf]:mult
CFG_NIOS_CPU_TIMER[0-9]_AR [ptf]:always_run
CFG_NIOS_CPU_TIMER[0-9]_FP [ptf]:fixed_period
CFG_NIOS_CPU_TIMER[0-9]_SS [ptf]:snapshot
U A R T N I O S S D K [2]
-------------------------------------------------------------------------------
CFG_NIOS_CPU_UART_NUMS nasys_uart_count
CFG_NIOS_CPU_UART[0-9] nasys_uart_[0-9]
CFG_NIOS_CPU_UART[0-9]_IRQ nasys_uart_[0-9]_irq
CFG_NIOS_CPU_UART[0-9]_BR [ptf]:baud
CFG_NIOS_CPU_UART[0-9]_DB [ptf]:data_bits
CFG_NIOS_CPU_UART[0-9]_SB [ptf]:stop_bits
CFG_NIOS_CPU_UART[0-9]_PA [ptf]:parity
CFG_NIOS_CPU_UART[0-9]_HS [ptf]:use_cts_rts
CFG_NIOS_CPU_UART[0-9]_EOP [ptf]:use_eop_register
P I O N I O S S D K [4]
-------------------------------------------------------------------------------
CFG_NIOS_CPU_PIO_NUMS nasys_pio_count
CFG_NIOS_CPU_PIO[0-9] nasys_pio_[0-9]
CFG_NIOS_CPU_PIO[0-9]_IRQ nasys_pio_[0-9]_irq
CFG_NIOS_CPU_PIO[0-9]_BITS [ptf]:Data_Width
CFG_NIOS_CPU_PIO[0-9]_TYPE [ptf]:has_tri
[ptf]:has_out
[ptf]:has_in
CFG_NIOS_CPU_PIO[0-9]_CAP [ptf]:capture
CFG_NIOS_CPU_PIO[0-9]_EDGE [ptf]:edge_type
CFG_NIOS_CPU_PIO[0-9]_ITYPE [ptf]:irq_type
S P I N I O S S D K [6]
-------------------------------------------------------------------------------
CFG_NIOS_CPU_SPI_NUMS nasys_spi_count
CFG_NIOS_CPU_SPI[0-9] nasys_spi_[0-9]
CFG_NIOS_CPU_SPI[0-9]_IRQ nasys_spi_[0-9]_irq
CFG_NIOS_CPU_SPI[0-9]_BITS [ptf]:databits
CFG_NIOS_CPU_SPI[0-9]_MA [ptf]:ismaster
CFG_NIOS_CPU_SPI[0-9]_SLN [ptf]:numslaves
CFG_NIOS_CPU_SPI[0-9]_TCLK [ptf]:targetclock
CFG_NIOS_CPU_SPI[0-9]_TDELAY [ptf]:targetdelay
CFG_NIOS_CPU_SPI[0-9]_* [ptf]:*
I D E N I O S S D K
-------------------------------------------------------------------------------
CFG_NIOS_CPU_IDE_NUMS nasys_usersocket_count
CFG_NIOS_CPU_IDE[0-9] nasys_usersocket_[0-9]
A S M I N I O S S D K [5]
-------------------------------------------------------------------------------
CFG_NIOS_CPU_ASMI_NUMS nasys_asmi_count
CFG_NIOS_CPU_ASMI[0-9] nasys_asmi_[0-9]
CFG_NIOS_CPU_ASMI[0-9]_IRQ nasys_asmi_[0-9]_irq
E t h e r n e t ( L A N ) N I O S S D K
-------------------------------------------------------------------------------
CFG_NIOS_CPU_LAN_NUMS
CFG_NIOS_CPU_LAN[0-9]_BASE na_lan91c111
CFG_NIOS_CPU_LAN[0-9]_OFFS LAN91C111_REGISTERS_OFFSET
CFG_NIOS_CPU_LAN[0-9]_IRQ na_lan91c111_irq
CFG_NIOS_CPU_LAN[0-9]_BUSW LAN91C111_DATA_BUS_WIDTH
CFG_NIOS_CPU_LAN[0-9]_TYPE
s y s t e m c o m p o s i n g N I O S S D K
-------------------------------------------------------------------------------
CFG_NIOS_CPU_TICK_TIMER (na_low_priority_timer2)
CFG_NIOS_CPU_USER_TIMER (na_timer1)
CFG_NIOS_CPU_BUTTON_PIO (na_button_pio)
CFG_NIOS_CPU_LCD_PIO (na_lcd_pio)
CFG_NIOS_CPU_LED_PIO (na_led_pio)
CFG_NIOS_CPU_SEVENSEG_PIO (na_seven_seg_pio)
CFG_NIOS_CPU_RECONF_PIO (na_reconfig_request_pio)
CFG_NIOS_CPU_CFPRESENT_PIO (na_cf_present_pio)
CFG_NIOS_CPU_CFPOWER_PIO (na_cf_power_pio)
CFG_NIOS_CPU_CFATASEL_PIO (na_cf_ata_select_pio)
CFG_NIOS_CPU_USER_SPI (na_spi)
===============================================================================
R E F E R E N C E S
===============================================================================
[1] http://www.altera.com/literature/ds/ds_nioscpu.pdf
[2] http://www.altera.com/literature/ds/ds_nios_uart.pdf
[3] http://www.altera.com/literature/ds/ds_nios_timer.pdf
[4] http://www.altera.com/literature/ds/ds_nios_pio.pdf
[5] http://www.altera.com/literature/ds/ds_nios_asmi.pdf
[6] http://www.altera.com/literature/ds/ds_nios_spi.pdf
[7] http://www.altera.com/literature/ds/ds_legacy_sdram_ctrl.pdf
===============================================================================
Stephan Linz <linz@li-pro.net>