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https://github.com/u-boot/u-boot.git
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7194ab8095
All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver - updated blackfin standalone EEPROM app after testing Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
130 lines
2.9 KiB
C
130 lines
2.9 KiB
C
/*
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* (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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#include <i2c.h>
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#include <flash.h>
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#include <nand.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* arch number of NetStar board */
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gd->bd->bi_arch_number = MACH_TYPE_NETSTAR;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x10000100;
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return 0;
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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/* Take the Ethernet controller out of reset and wait
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* for the EEPROM load to complete. */
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*((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80;
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udelay(10); /* doesn't work before timer_init call */
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*((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80;
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udelay(500);
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return 0;
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}
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int misc_init_r(void)
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{
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#if defined(CONFIG_RTC_DS1307)
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/* enable trickle charge */
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i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, 0x10, 0xaa);
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#endif
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return 0;
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}
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int board_late_init(void)
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{
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return 0;
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}
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#if defined(CONFIG_CMD_FLASH)
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t * info)
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{
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if (banknum == 0) { /* AM29LV800 boot flash */
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info->portwidth = FLASH_CFI_16BIT;
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info->chipwidth = FLASH_CFI_BY16;
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info->interface = FLASH_CFI_X16;
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return 1;
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}
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return 0;
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}
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#endif
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#if defined(CONFIG_CMD_NAND)
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/*
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* hardware specific access to control-lines
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*
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* NAND_NCE: bit 0 - don't care
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* NAND_CLE: bit 1 -> bit 1 (0x0002)
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* NAND_ALE: bit 2 -> bit 2 (0x0004)
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*/
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static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *chip = mtd->priv;
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unsigned long mask;
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if (cmd == NAND_CMD_NONE)
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return;
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mask = (ctrl & NAND_CLE) ? 0x02 : 0;
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if (ctrl & NAND_ALE)
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mask |= 0x04;
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writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
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}
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int board_nand_init(struct nand_chip *nand)
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{
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nand->options = NAND_SAMSUNG_LP_OPTIONS;
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nand->ecc.mode = NAND_ECC_SOFT;
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nand->cmd_ctrl = netstar_nand_hwcontrol;
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nand->chip_delay = 400;
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return 0;
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}
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#endif
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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