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e604410d3e
All ELF fields whose values are inspected by the code are converted to CPU byteorder first. Values which are copied verbatim (relocation fixups) are not swapped to CPU byteorder and back as it is not needed. Signed-off-by: Marcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
114 lines
3.4 KiB
C++
114 lines
3.4 KiB
C++
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Andes Technology
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* Chih-Mao Chen <cmchen@andestech.com>
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*
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* Statically process runtime relocations on RISC-V ELF images
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* so that it can be directly executed when loaded at LMA
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* without fixup. Both RV32 and RV64 are supported.
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*/
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#define CONCAT_IMPL(x, y) x##y
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#define CONCAT(x, y) CONCAT_IMPL(x, y)
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#define CONCAT3(x, y, z) CONCAT(CONCAT(x, y), z)
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#define prelink_nn CONCAT(prelink, PRELINK_INC_BITS)
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#define uintnn_t CONCAT3(uint, PRELINK_INC_BITS, _t)
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#define get_offset_nn CONCAT(get_offset_, PRELINK_INC_BITS)
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#define Elf_Ehdr CONCAT3(Elf, PRELINK_INC_BITS, _Ehdr)
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#define Elf_Phdr CONCAT3(Elf, PRELINK_INC_BITS, _Phdr)
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#define Elf_Rela CONCAT3(Elf, PRELINK_INC_BITS, _Rela)
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#define Elf_Sym CONCAT3(Elf, PRELINK_INC_BITS, _Sym)
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#define Elf_Dyn CONCAT3(Elf, PRELINK_INC_BITS, _Dyn)
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#define Elf_Addr CONCAT3(Elf, PRELINK_INC_BITS, _Addr)
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#define ELF_R_TYPE CONCAT3(ELF, PRELINK_INC_BITS, _R_TYPE)
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#define ELF_R_SYM CONCAT3(ELF, PRELINK_INC_BITS, _R_SYM)
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#define lenn_to_cpu CONCAT3(le, PRELINK_INC_BITS, _to_cpu)
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static void* get_offset_nn (void* data, Elf_Phdr* phdrs, size_t phnum, Elf_Addr addr)
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{
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Elf_Phdr *p;
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for (p = phdrs; p < phdrs + phnum; ++p)
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if (lenn_to_cpu(p->p_vaddr) <= addr && lenn_to_cpu(p->p_vaddr) + lenn_to_cpu(p->p_memsz) > addr)
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return data + lenn_to_cpu(p->p_offset) + (addr - lenn_to_cpu(p->p_vaddr));
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return NULL;
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}
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static void prelink_nn(void *data)
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{
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Elf_Ehdr *ehdr = data;
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Elf_Phdr *p;
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Elf_Dyn *dyn;
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Elf_Rela *r;
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if (le16_to_cpu(ehdr->e_machine) != EM_RISCV)
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die("Machine type is not RISC-V");
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Elf_Phdr *phdrs = data + lenn_to_cpu(ehdr->e_phoff);
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Elf_Dyn *dyns = NULL;
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for (p = phdrs; p < phdrs + le16_to_cpu(ehdr->e_phnum); ++p) {
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if (le32_to_cpu(p->p_type) == PT_DYNAMIC) {
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dyns = data + lenn_to_cpu(p->p_offset);
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break;
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}
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}
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if (dyns == NULL)
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die("No dynamic section found");
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Elf_Rela *rela_dyn = NULL;
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size_t rela_count = 0;
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Elf_Sym *dynsym = NULL;
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for (dyn = dyns;; ++dyn) {
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if (lenn_to_cpu(dyn->d_tag) == DT_NULL)
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break;
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else if (lenn_to_cpu(dyn->d_tag) == DT_RELA)
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rela_dyn = get_offset_nn(data, phdrs, le16_to_cpu(ehdr->e_phnum), + lenn_to_cpu(dyn->d_un.d_ptr));
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else if (lenn_to_cpu(dyn->d_tag) == DT_RELASZ)
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rela_count = lenn_to_cpu(dyn->d_un.d_val) / sizeof(Elf_Rela);
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else if (lenn_to_cpu(dyn->d_tag) == DT_SYMTAB)
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dynsym = get_offset_nn(data, phdrs, le16_to_cpu(ehdr->e_phnum), + lenn_to_cpu(dyn->d_un.d_ptr));
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}
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if (rela_dyn == NULL)
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die("No .rela.dyn found");
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if (dynsym == NULL)
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die("No .dynsym found");
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for (r = rela_dyn; r < rela_dyn + rela_count; ++r) {
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void* buf = get_offset_nn(data, phdrs, le16_to_cpu(ehdr->e_phnum), lenn_to_cpu(r->r_offset));
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if (buf == NULL)
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continue;
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if (ELF_R_TYPE(lenn_to_cpu(r->r_info)) == R_RISCV_RELATIVE)
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*((uintnn_t*) buf) = r->r_addend;
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else if (ELF_R_TYPE(lenn_to_cpu(r->r_info)) == R_RISCV_32)
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*((uint32_t*) buf) = dynsym[ELF_R_SYM(lenn_to_cpu(r->r_info))].st_value;
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else if (ELF_R_TYPE(lenn_to_cpu(r->r_info)) == R_RISCV_64)
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*((uint64_t*) buf) = dynsym[ELF_R_SYM(lenn_to_cpu(r->r_info))].st_value;
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}
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}
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#undef prelink_nn
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#undef uintnn_t
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#undef get_offset_nn
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#undef Elf_Ehdr
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#undef Elf_Phdr
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#undef Elf_Rela
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#undef Elf_Sym
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#undef Elf_Dyn
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#undef Elf_Addr
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#undef ELF_R_TYPE
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#undef ELF_R_SYM
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#undef lenn_to_cpu
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#undef CONCAT_IMPL
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#undef CONCAT
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#undef CONCAT3
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