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3ff2f001c2
It looks that x86 chipset always contains a host bridge at pci b.d.f 0.0.0, so enable this for all boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
55 lines
1.2 KiB
C
55 lines
1.2 KiB
C
/*
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* Copyright (C) 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <configs/x86-common.h>
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#define CONFIG_SYS_MONITOR_LEN (1 << 20)
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_SMSC_LPC47M
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#define CONFIG_SYS_EARLY_PCI_INIT
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#define CONFIG_PCI_PNP
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#define CONFIG_RTL8169
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#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
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"stdout=vga,serial\0" \
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"stderr=vga,serial\0"
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#define CONFIG_SCSI_DEV_LIST \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
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{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_MMC
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#define CONFIG_SDHCI
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MMC_SDMA
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#define CONFIG_CMD_MMC
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#undef CONFIG_USB_MAX_CONTROLLER_COUNT
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#define VIDEO_IO_OFFSET 0
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#define CONFIG_X86EMU_RAW_IO
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_FIT_SIGNATURE
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#define CONFIG_RSA
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#define CONFIG_ENV_SECT_SIZE 0x1000
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#define CONFIG_ENV_OFFSET 0x007fe000
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#endif /* __CONFIG_H */
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