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db2c86d7d7
u-boot/arch/mips
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Gabor Juhos db2c86d7d7 MIPS: mips32/cache.S: use v1 register for indirect function calls 
Synchronize the code with mips64/cache.S, in order to
allow further unifications.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:07 -04:00
..
cpu MIPS: mips32/cache.S: use v1 register for indirect function calls 2013-07-24 09:51:07 -04:00
include/asm MIPS: qemu-malta: setup GT64120 registers as done by YAMON 2013-07-24 09:51:04 -04:00
lib Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
config.mk Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00