u-boot/drivers/spi
Simon Glass 9cc36a2b89 dm: core: Add a flag to control sequence numbering
At present we try to use the 'reg' property and device tree aliases to give
devices a sequence number. The 'reg' property is often actually a memory
address, so the sequence numbers thus-obtained are not useful. It would be
better if the devices were just sequentially numbered in that case. In fact
neither I2C nor SPI use this feature, so drop it.

Some devices need us to look up an alias to number them within the uclass.
Add a flag to control this, so it is not done unless it is needed.

Adjust the tests to test this new behaviour.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-01-29 17:09:55 -07:00
..
altera_spi.c spi: altera: Move the config options to the top 2014-10-27 22:37:03 +05:30
andes_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
andes_spi.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
armada100_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
atmel_dataflash_spi.c spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation 2014-03-17 21:54:57 +05:30
atmel_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
atmel_spi.h spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common header 2014-11-17 08:47:16 -05:00
bfin_spi6xx.c blackfin: add spi and i2c specific get clock functions 2014-02-20 06:46:56 +01:00
bfin_spi.c blackfin: add spi and i2c specific get clock functions 2014-02-20 06:46:56 +01:00
cadence_qspi_apb.c spi: Add Cadence QSPI DM driver used by SoCFPGA 2014-12-06 13:52:46 +01:00
cadence_qspi.c spi: cadence_qspi: Fix checking return value of fdt_first_subnode() 2015-01-07 12:30:54 +05:30
cadence_qspi.h spi: Add Cadence QSPI DM driver used by SoCFPGA 2014-12-06 13:52:46 +01:00
cf_qspi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
cf_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
davinci_spi.c spi: davinci: Fix register address for SPI1_BUS 2014-06-19 17:53:59 -04:00
davinci_spi.h spi: davinci: add support for multiple bus and chip select 2014-04-17 17:24:39 -04:00
designware_spi.c dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi 2015-01-06 16:02:58 +05:30
ep93xx_spi.c arm: ep9315: Return back Cirrus Logic EDB9315A board support 2014-07-04 23:45:48 +02:00
exynos_spi.c dm: exynos: Convert SPI to driver model 2014-10-22 10:36:49 -06:00
fsl_espi.c linux/kernel.h: sync min, max, min3, max3 macros with Linux 2014-11-23 06:48:30 -05:00
fsl_qspi.c qspi:fsl implement AHB read 2015-01-09 00:03:28 +05:30
fsl_qspi.h qspi:fsl implement AHB read 2015-01-09 00:03:28 +05:30
ftssp010_spi.c spi: ftssp010_spi: Simplify code flow in ftssp010_[wait|wait_tx|wait_rx] 2015-01-08 12:02:55 +05:30
ich.c x86: spi: Add device tree support 2015-01-24 06:13:45 -07:00
ich.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
Kconfig dm: add entries to Kconfig 2014-10-23 21:43:09 -06:00
kirkwood_spi.c spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE 2014-10-23 09:59:21 -04:00
Makefile spi: Add designware master SPI DM driver used on SoCFPGA 2014-12-06 13:52:47 +01:00
mpc8xxx_spi.c Coding Style cleanup: replace leading SPACEs by TABs 2013-10-14 16:06:54 -04:00
mpc52xx_spi.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mxc_spi.c linux/kernel.h: sync min, max, min3, max3 macros with Linux 2014-11-23 06:48:30 -05:00
mxs_spi.c spi: mxs_spi: Configure chipselect after block reset 2013-08-27 19:39:39 +05:30
oc_tiny_spi.c spi: Add GPL-2.0+ SPDX-License-Identifier for missing files 2013-10-16 00:14:01 +05:30
omap3_spi.c drivers/spi/omap3: Bug fix of premature write transfer completion 2014-03-12 16:22:12 -04:00
omap3_spi.h spi: omap3: add support for more word lengths 2013-11-12 10:02:44 +01:00
sandbox_spi.c dm: sandbox: spi: Move to driver model 2014-10-22 10:36:48 -06:00
sh_qspi.c spi: sh_qspi: Add header file that defines the address of registers 2014-01-16 08:07:20 +09:00
sh_spi.c spi: sh_spi: Use sh_spi_clear_bit() instead of open-coded 2014-01-11 12:21:31 +05:30
sh_spi.h sh_spi: Add 4 chip select signals supporting 2012-03-26 10:09:31 +09:00
soft_spi_legacy.c dm: spi: Remove SPI_INIT feature 2014-10-22 10:36:48 -06:00
soft_spi.c dm: spi: Remove use of fdtdec GPIO support 2015-01-29 17:09:52 -07:00
spi-emul-uclass.c dm: sandbox: Add a SPI emulation uclass 2014-10-22 10:36:46 -06:00
spi-uclass.c dm: core: Add a flag to control sequence numbering 2015-01-29 17:09:55 -07:00
spi.c spi: Support half-duplex mode in FDT decode 2014-08-06 00:18:01 +05:30
tegra20_sflash.c dm: tegra: spi: Convert to driver model 2014-10-22 10:36:52 -06:00
tegra20_slink.c dm: tegra: spi: Convert to driver model 2014-10-22 10:36:52 -06:00
tegra114_spi.c dm: tegra: spi: Convert to driver model 2014-10-22 10:36:52 -06:00
tegra_spi.h dm: tegra: spi: Convert to driver model 2014-10-22 10:36:52 -06:00
ti_qspi.c arm: omap: add support for am57xx devices 2014-12-04 11:04:14 -05:00
xilinx_spi.c spi: xilinx: Move timeout calculation out of the loop 2014-02-18 22:24:28 +05:30
xilinx_spi.h spi: Add GPL-2.0+ SPDX-License-Identifier for missing files 2013-10-16 00:14:01 +05:30
zynq_spi.c spi: Add zynq spi controller driver 2013-08-07 01:09:47 +05:30