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2be296538e
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
95 lines
2.6 KiB
C
95 lines
2.6 KiB
C
/**
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* (C) Copyright 2014, Cavium Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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**/
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#ifndef __THUNDERX_88XX_H__
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#define __THUNDERX_88XX_H__
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#define CONFIG_REMAKE_ELF
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#define CONFIG_THUNDERX
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#define CONFIG_SYS_64BIT
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#define MEM_BASE 0x00500000
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#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
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/* Link Definitions */
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#define CONFIG_SYS_TEXT_BASE 0x00500000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* SMP Spin Table Definitions */
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#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
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#define CONFIG_SYS_MEMTEST_START MEM_BASE
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#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
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/* PL011 Serial Configuration */
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#define CONFIG_PL01X_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_CONS_INDEX 1
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/* Generic Interrupt Controller Definitions */
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#define GICD_BASE (0x801000000000)
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#define GICR_BASE (0x801000002000)
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#define CONFIG_SYS_SERIAL0 0x87e024000000
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#define CONFIG_SYS_SERIAL1 0x87e025000000
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/* BOOTP options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_PXE
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Initial environment variables */
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#define UBOOT_IMG_HEAD_SIZE 0x40
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/* C80000 - 0x40 */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr=08007ffc0\0" \
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"fdt_addr=0x94C00000\0" \
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"fdt_high=0x9fffffff\0"
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#define CONFIG_BOOTARGS \
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"console=ttyAMA0,115200n8 " \
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"earlycon=pl011,0x87e024000000 " \
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"debug maxcpus=48 rootwait rw "\
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"root=/dev/sda2 coherent_pool=16M"
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/* Do not preserve environment */
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#define CONFIG_ENV_SIZE 0x1000
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_NO_RELOCATION 1
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#define CONFIG_LIB_RAND
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#define PLL_REF_CLK 50000000 /* 50 MHz */
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#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
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#endif /* __THUNDERX_88XX_H__ */
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