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https://github.com/u-boot/u-boot.git
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acc57ecf05
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb
("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
84 lines
2.1 KiB
Plaintext
84 lines
2.1 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x8000
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_ENV_SECT_SIZE=0x1000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_TARGET_ROC_PC_RK3399=y
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
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CONFIG_DEBUG_UART=y
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_TPL=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MISC=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_SF_DEFAULT_BUS=1
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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# CONFIG_RAM_ROCKCHIP_DEBUG is not set
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CONFIG_RAM_RK3399_LPDDR4=y
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CONFIG_DM_RESET=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_ROCKCHIP_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_ROCKCHIP_USB2_PHY=y
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CONFIG_USB_KEYBOARD=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_ASIX88179=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_DM_VIDEO=y
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CONFIG_DISPLAY=y
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CONFIG_VIDEO_ROCKCHIP=y
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CONFIG_DISPLAY_ROCKCHIP_HDMI=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_ERRNO_STR=y
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