mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-29 23:53:33 +08:00
b4af64fdfd
Remove harcoded XHCI lists and detect mode, speed based on DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Serial-changes: 2 - Remove also XHCI macros from hardware.h - Remove additional new line in zcu106
48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Configuration for Xilinx ZynqMP zcu111
|
|
*
|
|
* (C) Copyright 2017 Xilinx, Inc.
|
|
* Michal Simek <michal.simek@xilinx.com>
|
|
*/
|
|
|
|
#ifndef __CONFIG_ZYNQMP_ZCU111_H
|
|
#define __CONFIG_ZYNQMP_ZCU111_H
|
|
|
|
#define CONFIG_ZYNQ_SDHCI1
|
|
#define CONFIG_SYS_I2C_MAX_HOPS 1
|
|
#define CONFIG_SYS_NUM_I2C_BUSES 21
|
|
#define CONFIG_SYS_I2C_BUSES { \
|
|
{0, {I2C_NULL_HOP} }, \
|
|
{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
|
|
{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
|
|
{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
|
|
{0, {{I2C_MUX_PCA9544, 0x75, 3} } }, \
|
|
{1, {I2C_NULL_HOP} }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
|
|
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
|
|
}
|
|
|
|
#define CONFIG_PCA953X
|
|
|
|
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
|
#define CONFIG_ZYNQ_EEPROM_BUS 5
|
|
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
|
|
|
|
#include <configs/xilinx_zynqmp.h>
|
|
|
|
#endif /* __CONFIG_ZYNQMP_ZCU111_H */
|