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dc018fef2f
As all sama5 nandflash env configurations are same, so move them to at91-sama5_common.h. Signed-off-by: Josh Wu <josh.wu@atmel.com>
168 lines
4.3 KiB
C
168 lines
4.3 KiB
C
/*
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* Configuration settings for the SAMA5D3 Xplained board.
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*
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* Copyright (C) 2014 Atmel Corporation
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* Bo Shen <voice.shen@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* No NOR flash, this definition should put before common header */
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#define CONFIG_SYS_NO_FLASH
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#include "at91-sama5_common.h"
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_DBGU
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/*
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* This needs to be defined for the OHCI code to work but it is defined as
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* ATMEL_ID_UHPHS in the CPU specific header files.
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*/
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#define ATMEL_ID_UHP ATMEL_ID_UHPHS
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/*
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* Specify the clock enable bit in the PMC_SCER register.
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*/
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_INIT_SP_ADDR 0x310000
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#else
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
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#endif
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/* NAND flash */
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#define CONFIG_CMD_NAND
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* PMECC & PMERRLOC */
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#define CONFIG_ATMEL_NAND_HWECC
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#define CONFIG_ATMEL_NAND_HW_PMECC
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#define CONFIG_PMECC_CAP 4
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#define CONFIG_PMECC_SECTOR_SIZE 512
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#define CONFIG_CMD_NAND_TRIMFFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#endif
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/* Ethernet Hardware */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_MACB_SEARCH_PHY
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#define CONFIG_RGMII
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#define CONFIG_CMD_MII
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#define CONFIG_PHYLIB
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/* MMC */
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#define CONFIG_CMD_MMC
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_GENERIC_ATMEL_MCI
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#define CONFIG_ATMEL_MCI_8BIT
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#endif
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/* USB */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_DOS_PARTITION
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#define CONFIG_USB_STORAGE
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#endif
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#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_EXT4_WRITE
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#if CONFIG_SYS_USE_NANDFLASH
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/* override the bootcmd, bootargs and other configuration for nandflash env */
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#elif CONFIG_SYS_USE_MMC
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/* override the bootcmd, bootargs and other configuration for sd/mmc env */
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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/* SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x300000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_BSS_START_ADDR 0x20000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SYS_MONITOR_LEN (512 << 10)
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#ifdef CONFIG_SYS_USE_MMC
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#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#elif CONFIG_SYS_USE_NANDFLASH
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
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#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
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#endif
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#endif
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