u-boot/include/configs/r2dplus.h
Simon Glass d2da54bfc4 Convert CONFIG_SYS_IDE_MAXBUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_IDE_MAXBUS
   CONFIG_SYS_IDE_MAXDEVICE
   CONFIG_SYS_ATA_BASE_ADDR
   CONFIG_SYS_ATA_STRIDE
   CONFIG_SYS_ATA_DATA_OFFSET
   CONFIG_SYS_ATA_REG_OFFSET
   CONFIG_SYS_ATA_ALT_OFFSET
   CONFIG_SYS_ATA_IDE0_OFFSET
   CONFIG_SYS_ATA_IDE1_OFFSET
   CONFIG_ATAPI
   CONFIG_IDE_RESET

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-09 09:16:47 -05:00

43 lines
845 B
C

#ifndef __CONFIG_H
#define __CONFIG_H
#define __LITTLE_ENDIAN__ 1
/* SCIF */
#define CONFIG_CONS_SCIF1 1
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE 0x8C000000
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
#define CONFIG_SYS_PBSIZE 256
/* Address of u-boot image in Flash */
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/*
* NOR Flash ( Spantion S29GL256P )
*/
#define CONFIG_SYS_FLASH_BASE (0xA0000000)
#define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
/*
* SuperH Clock setting
*/
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
/*
* IDE support
*/
#define CONFIG_SYS_PIO_MODE 1
/*
* SuperH PCI Bridge Configration
*/
#define CONFIG_SH7751_PCI
#endif /* __CONFIG_H */