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5d88902401
The EFI subsystem accesses the real time clock and is enabled by default. So we should drop any CONFIG_CMD_DATE dependency from the real time clock drivers. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
131 lines
3.8 KiB
C
131 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2008
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* based on a the Linux rtc-m41t80.c driver which is:
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* Alexander Bigga <ab@mycable.de>, 2006 (c) mycable GmbH
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*/
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/*
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* Date & Time support for STMicroelectronics M41T62
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*/
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/* #define DEBUG */
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <i2c.h>
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#define M41T62_REG_SSEC 0
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#define M41T62_REG_SEC 1
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#define M41T62_REG_MIN 2
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#define M41T62_REG_HOUR 3
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#define M41T62_REG_WDAY 4
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#define M41T62_REG_DAY 5
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#define M41T62_REG_MON 6
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#define M41T62_REG_YEAR 7
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#define M41T62_REG_ALARM_MON 0xa
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#define M41T62_REG_ALARM_DAY 0xb
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#define M41T62_REG_ALARM_HOUR 0xc
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#define M41T62_REG_ALARM_MIN 0xd
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#define M41T62_REG_ALARM_SEC 0xe
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#define M41T62_REG_FLAGS 0xf
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#define M41T62_DATETIME_REG_SIZE (M41T62_REG_YEAR + 1)
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#define M41T62_ALARM_REG_SIZE \
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(M41T62_REG_ALARM_SEC + 1 - M41T62_REG_ALARM_MON)
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#define M41T62_SEC_ST (1 << 7) /* ST: Stop Bit */
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#define M41T62_ALMON_AFE (1 << 7) /* AFE: AF Enable Bit */
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#define M41T62_ALMON_SQWE (1 << 6) /* SQWE: SQW Enable Bit */
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#define M41T62_ALHOUR_HT (1 << 6) /* HT: Halt Update Bit */
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#define M41T62_FLAGS_AF (1 << 6) /* AF: Alarm Flag Bit */
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#define M41T62_FLAGS_BATT_LOW (1 << 4) /* BL: Battery Low Bit */
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#define M41T62_FEATURE_HT (1 << 0)
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#define M41T62_FEATURE_BL (1 << 1)
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#define M41T80_ALHOUR_HT (1 << 6) /* HT: Halt Update Bit */
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int rtc_get(struct rtc_time *tm)
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{
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u8 buf[M41T62_DATETIME_REG_SIZE];
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i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE);
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debug("%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
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"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
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__FUNCTION__,
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buf[0], buf[1], buf[2], buf[3],
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buf[4], buf[5], buf[6], buf[7]);
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tm->tm_sec = bcd2bin(buf[M41T62_REG_SEC] & 0x7f);
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tm->tm_min = bcd2bin(buf[M41T62_REG_MIN] & 0x7f);
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tm->tm_hour = bcd2bin(buf[M41T62_REG_HOUR] & 0x3f);
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tm->tm_mday = bcd2bin(buf[M41T62_REG_DAY] & 0x3f);
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tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07;
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tm->tm_mon = bcd2bin(buf[M41T62_REG_MON] & 0x1f);
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/* assume 20YY not 19YY, and ignore the Century Bit */
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/* U-Boot needs to add 1900 here */
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tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900;
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debug("%s: tm is secs=%d, mins=%d, hours=%d, "
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"mday=%d, mon=%d, year=%d, wday=%d\n",
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__FUNCTION__,
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tm->tm_sec, tm->tm_min, tm->tm_hour,
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tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
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return 0;
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}
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int rtc_set(struct rtc_time *tm)
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{
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u8 buf[M41T62_DATETIME_REG_SIZE];
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debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE);
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/* Merge time-data and register flags into buf[0..7] */
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buf[M41T62_REG_SSEC] = 0;
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buf[M41T62_REG_SEC] =
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bin2bcd(tm->tm_sec) | (buf[M41T62_REG_SEC] & ~0x7f);
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buf[M41T62_REG_MIN] =
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bin2bcd(tm->tm_min) | (buf[M41T62_REG_MIN] & ~0x7f);
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buf[M41T62_REG_HOUR] =
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bin2bcd(tm->tm_hour) | (buf[M41T62_REG_HOUR] & ~0x3f) ;
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buf[M41T62_REG_WDAY] =
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(tm->tm_wday & 0x07) | (buf[M41T62_REG_WDAY] & ~0x07);
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buf[M41T62_REG_DAY] =
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bin2bcd(tm->tm_mday) | (buf[M41T62_REG_DAY] & ~0x3f);
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buf[M41T62_REG_MON] =
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bin2bcd(tm->tm_mon) | (buf[M41T62_REG_MON] & ~0x1f);
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/* assume 20YY not 19YY */
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buf[M41T62_REG_YEAR] = bin2bcd(tm->tm_year % 100);
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if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 1, buf, M41T62_DATETIME_REG_SIZE)) {
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printf("I2C write failed in %s()\n", __func__);
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return -1;
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}
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return 0;
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}
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void rtc_reset(void)
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{
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u8 val;
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/*
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* M41T82: Make sure HT (Halt Update) bit is cleared.
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* This bit is 0 in M41T62 so its save to clear it always.
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*/
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i2c_read(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
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val &= ~M41T80_ALHOUR_HT;
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i2c_write(CONFIG_SYS_I2C_RTC_ADDR, M41T62_REG_ALARM_HOUR, 1, &val, 1);
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}
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