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306881a0bf
This converts the following to Kconfig: CONFIG_PHYLIB CONFIG_BITBANGMII CONFIG_MV88E6352_SWITCH CONFIG_MV88E61XX_SWITCH CONFIG_PHYLIB_10G CONFIG_PHY_AQUANTIA CONFIG_PHY_ATHEROS CONFIG_PHY_BROADCOM CONFIG_PHY_CORTINA CONFIG_PHY_DAVICOM CONFIG_PHY_ET1011C CONFIG_PHY_LXT CONFIG_PHY_MARVELL CONFIG_PHY_MICREL CONFIG_PHY_NATSEMI CONFIG_PHY_REALTEK CONFIG_RTL8211X_PHY_FORCE_MASTER CONFIG_PHY_SMSC CONFIG_PHY_TERANETICS CONFIG_PHY_TI CONFIG_PHY_VITESSE CONFIG_PHY_XILINX Signed-off-by: Tom Rini <trini@konsulko.com>
36 lines
861 B
C
36 lines
861 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* include/configs/condor.h
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* This file is Condor board configuration.
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*
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* Copyright (C) 2019 Renesas Electronics Corporation
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*/
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#ifndef __CONDOR_H
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#define __CONDOR_H
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#include "rcar-gen3-common.h"
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/* Ethernet RAVB */
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#define CONFIG_BITBANGMII_MULTI
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/* Environment compatibility */
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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/* XTAL_CLK : 33.33MHz */
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#define CONFIG_SYS_CLK_FREQ 33333333u
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/* Generic Timer Definitions (use in assembler source) */
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#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
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#endif /* __CONDOR_H */
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