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On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
36 lines
1.1 KiB
C
36 lines
1.1 KiB
C
/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _WINBOND_W83627_H_
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#define _WINBOND_W83627_H_
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/* I/O address of Winbond Super IO chip */
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#define WINBOND_IO_PORT 0x2e
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/* Logical device number */
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#define W83627DHG_FDC 0 /* Floppy */
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#define W83627DHG_PP 1 /* Parallel port */
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#define W83627DHG_SP1 2 /* Com1 */
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#define W83627DHG_SP2 3 /* Com2 */
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#define W83627DHG_KBC 5 /* PS/2 keyboard & mouse */
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#define W83627DHG_SPI 6 /* Serial peripheral interface */
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#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
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#define W83627DHG_ACPI 10 /* ACPI */
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#define W83627DHG_HWM 11 /* Hardware monitor */
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#define W83627DHG_PECI_SST 12 /* PECI, SST */
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/**
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* Configure the base I/O port of the specified serial device and enable the
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* serial device.
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*
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* @dev: high 8 bits = super I/O port, low 8 bits = logical device number
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* @iobase: processor I/O port address to assign to this serial device
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* @irq: processor IRQ number to assign to this serial device
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*/
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void winbond_enable_serial(uint dev, uint iobase, uint irq);
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#endif /* _WINBOND_W83627_H_ */
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