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e81e8af98f
update panel driver hx8238 fix build bug Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210611161350.2141-15-Gireesh.Hiremath@in.bosch.com
198 lines
6.6 KiB
C
198 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copied from simple-panel
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* Copyright (c) 2016 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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* Copyright (c) 2018 Sjoerd Simons <sjoerd.simons@collabora.co.uk>
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* Modified by Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
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*
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* Panel Initialization for HX8238D panel from Himax
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* Resolution: 320x240
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* Color-Mode: RGB
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*
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*/
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#include <common.h>
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#include <dm.h>
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#include <panel.h>
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#include <spi.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Register Address */
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#define HX8238D_OUTPUT_CTRL_ADDR 0x01
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#define HX8238D_LCD_AC_CTRL_ADDR 0x02
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#define HX8238D_POWER_CTRL_1_ADDR 0x03
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#define HX8238D_DATA_CLR_CTRL_ADDR 0X04
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#define HX8238D_FUNCTION_CTRL_ADDR 0x05
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#define HX8238D_LED_CTRL_ADDR 0x08
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#define HX8238D_CONT_BRIGHT_CTRL_ADDR 0x0A
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#define HX8238D_FRAME_CYCLE_CTRL_ADDR 0x0B
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#define HX8238D_POWER_CTRL_2_ADDR 0x0D
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#define HX8238D_POWER_CTRL_3_ADDR 0x0E
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#define HX8238D_GATE_SCAN_POS_ADDR 0x0F
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#define HX8238D_HORIZONTAL_PORCH_ADDR 0x16
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#define HX8238D_VERTICAL_PORCH_ADDR 0x17
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#define HX8238D_POWER_CTRL_4_ADDR 0x1E
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#define HX8238D_GAMMA_CTRL_1_ADDR 0x30
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#define HX8238D_GAMMA_CTRL_2_ADDR 0x31
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#define HX8238D_GAMMA_CTRL_3_ADDR 0x32
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#define HX8238D_GAMMA_CTRL_4_ADDR 0x33
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#define HX8238D_GAMMA_CTRL_5_ADDR 0x34
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#define HX8238D_GAMMA_CTRL_6_ADDR 0x35
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#define HX8238D_GAMMA_CTRL_7_ADDR 0x36
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#define HX8238D_GAMMA_CTRL_8_ADDR 0x37
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#define HX8238D_GAMMA_CTRL_9_ADDR 0x3A
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#define HX8238D_GAMMA_CTRL_10_ADDR 0x3B
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/* Register Data */
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#define HX8238D_OUTPUT_CTRL 0x6300
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#define HX8238D_LCD_AC_CTRL 0x0200
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#define HX8238D_POWER_CTRL_1 0x6564
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#define HX8238D_DATA_CLR_CTRL 0x04C7
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#define HX8238D_FUNCTION_CTRL 0xA884
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#define HX8238D_LED_CTRL 0x00CE
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#define HX8238D_CONT_BRIGHT_CTRL 0x4008
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#define HX8238D_FRAME_CYCLE_CTRL 0xD400
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#define HX8238D_POWER_CTRL_2 0x3229
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#define HX8238D_POWER_CTRL_3 0x1200
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#define HX8238D_GATE_SCAN_POS 0x0000
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#define HX8238D_HORIZONTAL_PORCH 0x9F80
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#define HX8238D_VERTICAL_PORCH 0x3F02
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#define HX8238D_POWER_CTRL_4 0x005C
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/* Gamma Control */
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#define HX8238D_GAMMA_CTRL_1 0x0103
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#define HX8238D_GAMMA_CTRL_2 0x0407
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#define HX8238D_GAMMA_CTRL_3 0x0705
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#define HX8238D_GAMMA_CTRL_4 0x0002
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#define HX8238D_GAMMA_CTRL_5 0x0505
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#define HX8238D_GAMMA_CTRL_6 0x0303
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#define HX8238D_GAMMA_CTRL_7 0x0707
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#define HX8238D_GAMMA_CTRL_8 0x0100
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#define HX8238D_GAMMA_CTRL_9 0x1F00
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#define HX8238D_GAMMA_CTRL_10 0x000F
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/* Primary SPI register identification, 011100 */
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/* Select register, RS=0, RS=0 */
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/* Write register, RS=1, RW=0 */
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#define HX8238D_PRIMARY_SELECT_REG 0x70
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#define HX8238D_PRIMARY_WRITE_REG (HX8238D_PRIMARY_SELECT_REG | (0x1 << 1))
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#define HX8238D_REG_BIT_LEN 24
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struct hx8238d_priv {
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struct spi_slave *spi;
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};
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static int hx8238d_ofdata_to_platdata(struct udevice *dev)
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{
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struct hx8238d_priv *priv = dev_get_priv(dev);
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priv->spi = dev_get_parent_priv(dev);
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return 0;
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}
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/* data[0] => REGISTER ADDRESS */
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/* data[1] => REGISTER VALUE */
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struct hx8238d_command {
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u16 data[2];
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};
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static struct hx8238d_command hx8238d_init_commands[] = {
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{ .data = { HX8238D_OUTPUT_CTRL_ADDR, HX8238D_OUTPUT_CTRL } },
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{ .data = { HX8238D_LCD_AC_CTRL_ADDR, HX8238D_LCD_AC_CTRL } },
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{ .data = { HX8238D_POWER_CTRL_1_ADDR, HX8238D_POWER_CTRL_1 } },
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{ .data = { HX8238D_DATA_CLR_CTRL_ADDR, HX8238D_DATA_CLR_CTRL } },
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{ .data = { HX8238D_FUNCTION_CTRL_ADDR, HX8238D_FUNCTION_CTRL } },
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{ .data = { HX8238D_LED_CTRL_ADDR, HX8238D_LED_CTRL } },
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{ .data = { HX8238D_CONT_BRIGHT_CTRL_ADDR, HX8238D_CONT_BRIGHT_CTRL } },
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{ .data = { HX8238D_FRAME_CYCLE_CTRL_ADDR, HX8238D_FRAME_CYCLE_CTRL } },
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{ .data = { HX8238D_POWER_CTRL_2_ADDR, HX8238D_POWER_CTRL_2 } },
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{ .data = { HX8238D_POWER_CTRL_3_ADDR, HX8238D_POWER_CTRL_3 } },
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{ .data = { HX8238D_GATE_SCAN_POS_ADDR, HX8238D_GATE_SCAN_POS } },
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{ .data = { HX8238D_HORIZONTAL_PORCH_ADDR, HX8238D_HORIZONTAL_PORCH } },
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{ .data = { HX8238D_VERTICAL_PORCH_ADDR, HX8238D_VERTICAL_PORCH } },
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{ .data = { HX8238D_POWER_CTRL_4_ADDR, HX8238D_POWER_CTRL_4 } },
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{ .data = { HX8238D_GAMMA_CTRL_1_ADDR, HX8238D_GAMMA_CTRL_1 } },
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{ .data = { HX8238D_GAMMA_CTRL_2_ADDR, HX8238D_GAMMA_CTRL_2 } },
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{ .data = { HX8238D_GAMMA_CTRL_3_ADDR, HX8238D_GAMMA_CTRL_3 } },
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{ .data = { HX8238D_GAMMA_CTRL_4_ADDR, HX8238D_GAMMA_CTRL_4 } },
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{ .data = { HX8238D_GAMMA_CTRL_5_ADDR, HX8238D_GAMMA_CTRL_5 } },
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{ .data = { HX8238D_GAMMA_CTRL_6_ADDR, HX8238D_GAMMA_CTRL_6 } },
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{ .data = { HX8238D_GAMMA_CTRL_7_ADDR, HX8238D_GAMMA_CTRL_7 } },
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{ .data = { HX8238D_GAMMA_CTRL_8_ADDR, HX8238D_GAMMA_CTRL_8 } },
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{ .data = { HX8238D_GAMMA_CTRL_9_ADDR, HX8238D_GAMMA_CTRL_9 } },
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{ .data = { HX8238D_GAMMA_CTRL_10_ADDR, HX8238D_GAMMA_CTRL_10 } },
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};
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/*
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* Generate Primary Register Buffer for Register Select and Register Write
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* First 6 MSB bits of Primary Register is represented with 011100
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*
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*/
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static void hx8238d_generate_reg_buffers(struct hx8238d_command command,
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u8 *sr_buf, uint8_t *wr_buf)
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{
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struct hx8238d_command cmd = command;
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sr_buf[0] = HX8238D_PRIMARY_SELECT_REG;
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sr_buf[1] = (cmd.data[0] >> 8) & 0xff;
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sr_buf[2] = (cmd.data[0]) & 0xff;
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wr_buf[0] = HX8238D_PRIMARY_WRITE_REG;
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wr_buf[1] = (cmd.data[1] >> 8) & 0xff;
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wr_buf[2] = (cmd.data[1]) & 0xff;
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}
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static int hx8238d_probe(struct udevice *dev)
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{
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struct hx8238d_priv *priv = dev_get_priv(dev);
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int ret;
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ret = spi_claim_bus(priv->spi);
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if (ret) {
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debug("Failed to claim bus: %d\n", ret);
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return ret;
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}
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for (int i = 0; i < ARRAY_SIZE(hx8238d_init_commands); i++) {
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u8 sr_buf[3], wr_buf[3];
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const struct hx8238d_command cmd = hx8238d_init_commands[i];
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hx8238d_generate_reg_buffers(cmd, sr_buf, wr_buf);
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ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, sr_buf, NULL,
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SPI_XFER_BEGIN | SPI_XFER_END);
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if (ret) {
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debug("Failed to select register %d\n", ret);
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goto free;
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}
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ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, wr_buf, NULL,
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SPI_XFER_BEGIN | SPI_XFER_END);
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if (ret) {
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debug("Failed to write value %d\n", ret);
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goto free;
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}
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}
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free:
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spi_release_bus(priv->spi);
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return ret;
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}
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static const struct udevice_id hx8238d_ids[] = {
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{ .compatible = "himax,hx8238d" },
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{ }
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};
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U_BOOT_DRIVER(hx8238d) = {
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.name = "hx8238d",
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.id = UCLASS_PANEL,
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.of_match = hx8238d_ids,
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.of_to_plat = hx8238d_ofdata_to_platdata,
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.probe = hx8238d_probe,
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.priv_auto = sizeof(struct hx8238d_priv),
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};
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