u-boot/drivers/ram/stm32mp1
Patrick Delaunay b604a41c6b ram: stm32mp1_ddr: fix self refresh disable during DQS training
DDRCTRL_PWRCTL.SELFREF_EN needs to be reset before DQS training step, not
to enter in self refresh mode during the execution of this phase.
Depending on settings, it can be set after the DQS training.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:18 +01:00
..
Kconfig stm32mp1: ram: add tuning in DDR interactive mode 2019-05-23 11:38:11 +02:00
Makefile stm32mp1: ram: add tuning in DDR interactive mode 2019-05-23 11:38:11 +02:00
stm32mp1_ddr_regs.h ram: stm32mp1_ddr: fix self refresh disable during DQS training 2020-03-24 14:23:18 +01:00
stm32mp1_ddr.c ram: stm32mp1_ddr: fix self refresh disable during DQS training 2020-03-24 14:23:18 +01:00
stm32mp1_ddr.h stm32mp1: ram: cosmetic: remove unused prototype 2019-08-27 11:19:23 +02:00
stm32mp1_interactive.c ram: stm32mp1: don't display the prompt two times 2020-03-24 14:20:50 +01:00
stm32mp1_ram.c common: Move RAM-sizing functions to init.h 2020-01-17 14:02:35 -05:00
stm32mp1_tests.c common: Move RAM-sizing functions to init.h 2020-01-17 14:02:35 -05:00
stm32mp1_tests.h stm32mp1: ram: add tuning in DDR interactive mode 2019-05-23 11:38:11 +02:00
stm32mp1_tuning.c ram: stm32mp1: update BIST config for tuning 2020-03-24 14:20:50 +01:00