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u-boot/board/freescale/mpc8610hpcd
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York Sun 9a17eb5b7e Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx 
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25 11:43:46 -08:00
..
ddr.c Driver/DDR: Moving Freescale DDR driver to a common driver 2013-11-25 11:43:43 -08:00
law.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
Makefile Driver/DDR: Moving Freescale DDR driver to a common driver 2013-11-25 11:43:43 -08:00
mpc8610hpcd_diu.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mpc8610hpcd.c Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx 2013-11-25 11:43:46 -08:00
README doc: cleanup - move board READMEs into respective board directories 2012-07-29 15:42:02 +02:00

README 

Freescale MPC8610HPCD board
===========================


Building U-Boot
---------------

    $ make MPC8610HPCD_config
    Configuring for MPC8610HPCD board...

    $ make


Flashing U-Boot
---------------
The flash is 128M starting at 0xF800_0000.

The alternate image is at 0xFBF0_0000
The      boot image is at 0xFFF0_0000.


To Flash U-Boot into the booting bank:

	tftp 1000000 u-boot.bin
	protect off all
	erase fff00000 +$filesize
	cp.b 1000000 fff00000 $filesize


To Flash U-boot into the alternate bank

	tftp 1000000 u-boot.bin
	erase fbf00000 +$filesize
	cp.b 1000000 fbf00000 $filesize


pixis_reset command
-------------------
A new command, "pixis_reset", is introduced to reset mpc8610hpcd board
using the FPGA sequencer.  When the board restarts, it has the option
of using either the current or alternate flash bank as the boot
image, with or without the watchdog timer enabled, and finally with
or without frequency changes.

Usage is;

	pixis_reset
	pixis_reset altbank
	pixis_reset altbank wd
	pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
	pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>

Examples;

	/* reset to current bank, like "reset" command */
	pixis_reset

	/* reset board but use the to alternate flash bank */
	pixis_reset altbank

	/* reset board, use alternate flash bank with watchdog timer enabled*/
	pixis_reset altbank wd

	/* reset board to alternate bank with frequency changed.
	 * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio
	 */
	pixis-reset altbank cf 40 2.5 10


DIP Switch Settings
-------------------
To manually switch the flash banks using the DIP switch
settings, toggle both SW6:1 and SW6:2.