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5e7ffaa4a3
This enables the device tree library on the Integrator platforms so we can pass a device tree when booting. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
105 lines
3.9 KiB
C
105 lines
3.9 KiB
C
/*
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* (C) Copyright 2012
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* Linaro
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* Linus Walleij <linus.walleij@linaro.org>
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* Common ARM Integrator configuration settings
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define CONFIG_INTEGRATOR
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#define CONFIG_SYS_TEXT_BASE 0x01000000
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#define CONFIG_SYS_MEMTEST_START 0x100000
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#define CONFIG_SYS_MEMTEST_END 0x10000000
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
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#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
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#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
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/*
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* There are various dependencies on the core module (CM) fitted
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* Users should refer to their CM user guide
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*/
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#include "armcoremodule.h"
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/*
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* Initialize and remap the core module, use SPD to detect memory size
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* If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
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* the core module has a CM_INIT register
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* then the U-Boot initialisation code will
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* e.g. ARM Boot Monitor or pre-loader is repeated once
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* (to re-initialise any existing CM_INIT settings to safe values).
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*
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* This is usually not the desired behaviour since the platform
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* will either reboot into the ARM monitor (or pre-loader)
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* or continuously cycle thru it without U-Boot running,
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* depending upon the setting of Integrator/CP switch S2-4.
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*
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* However it may be needed if Integrator/CP switch S2-1
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* is set OFF to boot direct into U-Boot.
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* In that case comment out the line below.
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*/
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#define CONFIG_CM_INIT
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#define CONFIG_CM_REMAP
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#define CONFIG_CM_SPD_DETECT
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/*
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* The ARM boot monitor initializes the board.
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* However, the default U-Boot code also performs the initialization.
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* If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
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* - see documentation supplied with board for details of how to choose the
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* image to run at reset/power up
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* e.g. whether the ARM Boot Monitor runs before U-Boot
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*/
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/* #define CONFIG_SKIP_LOWLEVEL_INIT */
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/*
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* The ARM boot monitor does not relocate U-Boot.
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* However, the default U-Boot code performs the relocation check,
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* and may relocate the code if the memory map is changed.
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* If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
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*/
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/* #define SKIP_CONFIG_RELOCATE_UBOOT */
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
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