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4bae76d733
Migrate the ubispl configuration for the omap3_igep00x0 and am335x_igep003x boards to KConfig. Both boards were built with SOURCE_DATE_EPOCH=0 and found to be equal before and after. Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com> Cc: Heiko Schocher <hs@denx.de> Cc: Kyungmin Park <kmpark@infradead.org> Cc: Javier Martínez Canillas <javier@dowhile0.org> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
100 lines
2.6 KiB
C
100 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Common configuration settings for IGEP technology based boards
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*
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* (C) Copyright 2012
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* ISEE 2007 SL, <www.iseebcn.com>
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*/
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#ifndef __IGEP00X0_H
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#define __IGEP00X0_H
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#include <configs/ti_omap3_common.h>
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/*
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* We are only ever GP parts and will utilize all of the "downloaded image"
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* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
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*/
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#define CONFIG_REVISION_TAG 1
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/* TPS65950 */
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#define PBIASLITEVMODE1 (1 << 8)
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/* LED */
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#define IGEP0020_GPIO_LED 27
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#define IGEP0030_GPIO_LED 16
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/* Board and revision detection GPIOs */
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#define IGEP0030_USB_TRANSCEIVER_RESET 54
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#define GPIO_IGEP00X0_BOARD_DETECTION 28
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#define GPIO_IGEP00X0_REVISION_DETECTION 129
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#ifndef CONFIG_SPL_BUILD
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/* Environment */
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#define ENV_DEVICE_SETTINGS \
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"stdin=serial\0" \
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"stdout=serial\0" \
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"stderr=serial\0"
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#define MEM_LAYOUT_SETTINGS \
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DEFAULT_LINUX_BOOT_ENV \
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"scriptaddr=0x87E00000\0" \
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"pxefile_addr_r=0x87F00000\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0)
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#include <config_distro_bootcmd.h>
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#define ENV_FINDFDT \
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"findfdt="\
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"if test ${board_name} = igep0020; then " \
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"if test ${board_rev} = F; then " \
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"setenv fdtfile omap3-igep0020-rev-f.dtb; " \
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"else " \
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"setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
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"if test ${board_name} = igep0030; then " \
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"if test ${board_rev} = G; then " \
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"setenv fdtfile omap3-igep0030-rev-g.dtb; " \
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"else " \
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"setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
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"if test ${fdtfile} = ''; then " \
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"echo WARNING: Could not determine device tree to use; fi; \0"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_FINDFDT \
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ENV_DEVICE_SETTINGS \
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MEM_LAYOUT_SETTINGS \
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BOOTENV
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#endif
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#define CONFIG_SYS_MTDPARTS_RUNTIME
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/* OneNAND config */
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#define CONFIG_USE_ONENAND_BOARD_INIT
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#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
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#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
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/* NAND config */
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, \
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18, 19, 20, 21, 22, 23, 24, 25, \
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26, 27, 28, 29, 30, 31, 32, 33, \
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34, 35, 36, 37, 38, 39, 40, 41, \
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42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, }
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
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#endif /* __IGEP00X0_H */
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