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76379dfb7e
LS1012AFRDM has 512MB of DDR. So update kernel load address to 0x96000000. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __LS1012ARDB_H__
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#define __LS1012ARDB_H__
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#include "ls1012a_common.h"
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/* DDR */
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#define CONFIG_DIMM_SLOTS_PER_CTLR 1
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#define CONFIG_CHIP_SELECTS_PER_CTRL 1
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_SYS_SDRAM_SIZE 0x20000000
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#define CONFIG_CHIP_SELECTS_PER_CTRL 1
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#define CONFIG_CMD_MEMINFO
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"verify=no\0" \
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"loadaddr=0x80100000\0" \
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"kernel_addr=0x100000\0" \
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"fdt_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"kernel_start=0xa00000\0" \
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"kernel_load=0x96000000\0" \
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"kernel_size=0x2800000\0"
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/*
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* USB
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*/
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#define CONFIG_HAS_FSL_XHCI_USB
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#ifdef CONFIG_HAS_FSL_XHCI_USB
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#define CONFIG_USB_XHCI_FSL
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
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#endif
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#define CONFIG_CMD_MEMINFO
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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#endif /* __LS1012ARDB_H__ */
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