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2395625209
The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)
Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
110 lines
3.2 KiB
C
110 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2022 Gateworks Corporation
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*/
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#ifndef __IMX8MP_VENICE_H
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#define __IMX8MP_VENICE_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#define CONFIG_SPL_MAX_SIZE (152 * 1024)
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#define CONFIG_SYS_MONITOR_LEN SZ_512K
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#define CONFIG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_STACK 0x960000
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#define CONFIG_SPL_BSS_START_ADDR 0x0098FC00
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#define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
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#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
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/* For RAW image gives a error info not panic */
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#endif
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#define MEM_LAYOUT_ENV_SETTINGS \
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"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"fdt_addr_r=0x50200000\0" \
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"scriptaddr=0x50280000\0" \
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"ramdisk_addr_r=0x50300000\0" \
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"kernel_comp_addr_r=0x40200000\0"
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/* Enable Distro Boot */
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(USB, usb, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#else
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#define BOOTENV
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#endif
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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MEM_LAYOUT_ENV_SETTINGS \
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"script=boot.scr\0" \
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"bootm_size=0x10000000\0" \
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"dev=2\0" \
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"preboot=gsc wd-disable\0" \
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"console=ttymxc1,115200\0" \
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"update_firmware=" \
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"tftpboot $loadaddr $image && " \
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"setexpr blkcnt $filesize + 0x1ff && " \
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"setexpr blkcnt $blkcnt / 0x200 && " \
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"mmc dev $dev && " \
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"mmc write $loadaddr 0x40 $blkcnt\0" \
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"loadfdt=" \
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"if $fsload $fdt_addr_r $dir/$fdt_file1; " \
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"then echo loaded $fdt_file1; " \
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"elif $fsload $fdt_addr_r $dir/$fdt_file2; " \
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"then echo loaded $fdt_file2; " \
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"elif $fsload $fdt_addr_r $dir/$fdt_file3; " \
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"then echo loaded $fdt_file3; " \
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"elif $fsload $fdt_addr_r $dir/$fdt_file4; " \
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"then echo loaded $fdt_file4; " \
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"elif $fsload $fdt_addr_r $dir/$fdt_file5; " \
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"then echo loaded $fdt_file5; " \
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"fi\0" \
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"boot_net=" \
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"setenv fsload tftpboot; " \
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"run loadfdt && tftpboot $kernel_addr_r $dir/Image && " \
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"booti $kernel_addr_r - $fdt_addr_r\0" \
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"update_rootfs=" \
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"tftpboot $loadaddr $image && " \
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"gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \
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"update_all=" \
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"tftpboot $loadaddr $image && " \
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"gzwrite mmc $dev $loadaddr $filesize\0" \
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"erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0"
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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/* SDRAM configuration */
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_4G
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#endif
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