Stephen Warren a4bcd67c72 ARM: tegra: remove a conditional for CSITE rate ... There's already an SoC-specific conditional in cpu.h to determine the PLLP rate. Define the CSITE clock rate inside the same conditional, so that we can remove a conditional from clock_enable_coresight(). This means one less place to update the code for new SoCs. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>		2014-02-03 09:46:46 -07:00
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arm	ARM: tegra: remove a conditional for CSITE rate	2014-02-03 09:46:46 -07:00
avr32	avr32: delete unused header files	2014-01-24 16:59:07 -05:00
blackfin	blackfin: delete unused header files	2014-01-24 16:59:07 -05:00
m68k	include: delete include/linux/config.h	2013-11-08 15:25:13 -05:00
microblaze	Makefile: rename all libraries to built-in.o	2013-11-17 14:11:32 -05:00
mips	malta: enable PIIX4 SERIRQ	2013-11-26 21:49:34 +01:00
nds32	nds32: convert makefiles to Kbuild style	2013-11-01 11:42:11 -04:00
nios2	nios2: convert makefiles to Kbuild style	2013-11-01 11:42:11 -04:00
openrisc	openrisc: convert makefiles to Kbuild style	2013-10-31 13:26:45 -04:00
powerpc	powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition	2014-01-24 16:59:21 -05:00
sandbox	sandbox: fix the return type of os_free() function	2014-01-24 16:59:08 -05:00
sh	sh: sh2: Remove CONFIG_SH2A definition from asm/processor.h	2014-01-09 13:22:22 +09:00
sparc	sparc: Correct arch/sparc/cpu/leon3/start.S from SPDX conversion	2013-11-25 10:41:55 -05:00
x86	x86: delete unused header files	2014-01-24 16:59:07 -05:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00