mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-30 08:03:32 +08:00
99e1fa89f1
CONFIG_FSL_ENETC is not explicitly enabled in the NXP LS1028A config files, instead it is selected by CONFIG_MSCC_FELIX_SWITCH, a state of matters which is fragile. CONFIG_MSCC_FELIX_SWITCH depends on CONFIG_DM_DSA, which depends on CONFIG_PHY_FIXED. Not all LS1028A boards did enable CONFIG_PHY_FIXED, which resulted in all of Ethernet being compiled out. This patch makes sure that CONFIG_PHY_FIXED is enabled for all LS1028A boards, and CONFIG_FSL_ENETC as well - don't rely on that fragile selection done by the Felix switch config. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
99 lines
2.3 KiB
Plaintext
99 lines
2.3 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_TARGET_LS1028AQDS=y
|
|
CONFIG_TFABOOT=y
|
|
CONFIG_SYS_MALLOC_LEN=0x202000
|
|
CONFIG_SYS_MALLOC_F_LEN=0x6000
|
|
CONFIG_NR_DRAM_BANKS=2
|
|
CONFIG_SYS_MEMTEST_START=0x80000000
|
|
CONFIG_SYS_MEMTEST_END=0x9fffffff
|
|
CONFIG_ENV_SIZE=0x2000
|
|
CONFIG_ENV_OFFSET=0x500000
|
|
CONFIG_ENV_SECT_SIZE=0x20000
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart"
|
|
CONFIG_FSPI_AHB_EN_4BYTE=y
|
|
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
|
|
CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
|
|
CONFIG_AHCI=y
|
|
CONFIG_DISTRO_DEFAULTS=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
|
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
|
|
CONFIG_BOOTDELAY=10
|
|
CONFIG_USE_BOOTARGS=y
|
|
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
|
|
CONFIG_MISC_INIT_R=y
|
|
CONFIG_ID_EEPROM=y
|
|
CONFIG_CMD_GREPENV=y
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
|
CONFIG_CMD_MEMTEST=y
|
|
CONFIG_CMD_DM=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_PCI=y
|
|
CONFIG_CMD_USB=y
|
|
CONFIG_CMD_WDT=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
|
CONFIG_ENV_ADDR=0x20500000
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
|
CONFIG_NETCONSOLE=y
|
|
CONFIG_DM=y
|
|
CONFIG_SCSI_AHCI=y
|
|
CONFIG_SATA_CEVA=y
|
|
CONFIG_FSL_CAAM=y
|
|
# CONFIG_DDR_SPD is not set
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
|
CONFIG_I2C_MUX=y
|
|
CONFIG_I2C_MUX_PCA954x=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
|
|
CONFIG_FSL_ESDHC=y
|
|
CONFIG_MTD=y
|
|
CONFIG_DM_SPI_FLASH=y
|
|
CONFIG_SPI_FLASH_EON=y
|
|
CONFIG_SPI_FLASH_STMICRO=y
|
|
CONFIG_SPI_FLASH_SST=y
|
|
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
|
CONFIG_PHYLIB=y
|
|
CONFIG_PHY_AQUANTIA=y
|
|
CONFIG_PHY_ATHEROS=y
|
|
CONFIG_PHY_VITESSE=y
|
|
CONFIG_PHY_FIXED=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_DM_MDIO=y
|
|
CONFIG_DM_MDIO_MUX=y
|
|
CONFIG_E1000=y
|
|
CONFIG_FSL_ENETC=y
|
|
CONFIG_MDIO_MUX_I2CREG=y
|
|
CONFIG_NVME=y
|
|
CONFIG_PCI=y
|
|
CONFIG_PCIE_ECAM_GENERIC=y
|
|
CONFIG_PCIE_LAYERSCAPE_RC=y
|
|
CONFIG_DM_RTC=y
|
|
CONFIG_RTC_PCF2127=y
|
|
CONFIG_SCSI=y
|
|
CONFIG_DM_SCSI=y
|
|
CONFIG_SPECIFY_CONSOLE_INDEX=y
|
|
CONFIG_DM_SERIAL=y
|
|
CONFIG_FSL_LPUART=y
|
|
CONFIG_SPI=y
|
|
CONFIG_DM_SPI=y
|
|
CONFIG_FSL_DSPI=y
|
|
CONFIG_NXP_FSPI=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_XHCI_DWC3=y
|
|
CONFIG_WDT=y
|
|
CONFIG_WDT_SP805=y
|
|
CONFIG_OF_LIBFDT_OVERLAY=y
|
|
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|