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623de3f086
This converts the following to Kconfig: CONFIG_SUPPORT_EMMC_BOOT As requested by Michal Simek <michal.simek@xilinx.com>, these boards have no eMMC so CONFIG_SUPPORT_EMMC_BOOT has not been migrated: xilinx_zynqmp_zc1275_revB xilinx_zynqmp_zc1751_xm018_dc4 xilinx_zynqmp_zc1751_xm019_dc5 xilinx_zynqmp_zcu100_revC xilinx_zynqmp_zcu102_rev1_0 xilinx_zynqmp_zcu102_revA xilinx_zynqmp_zcu102_revB xilinx_zynqmp_zcu104_revA xilinx_zynqmp_zcu104_revC xilinx_zynqmp_zcu106_revA xilinx_zynqmp_zcu111_revA Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Acked-by: Lukasz Majewski <lukma@denx.de> Acked-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
159 lines
4.5 KiB
C
159 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 NXP Semiconductors
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*
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* Configuration settings for the i.MX7S Warp board.
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*/
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#ifndef __WARP7_CONFIG_H
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#define __WARP7_CONFIG_H
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#include "mx7_common.h"
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#include <imximage.h>
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#define PHYS_SDRAM_SIZE SZ_512M
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/*
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* If we have defined the OPTEE ram size and not OPTEE it means that we were
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* launched by OPTEE, because of that we shall skip all the low level
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* initialization since it was already done by ATF or OPTEE
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*/
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#ifdef CONFIG_OPTEE_TZDRAM_SIZE
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#ifndef CONFIG_OPTEE
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
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/* MMC Config*/
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
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#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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/* Switch on SERIAL_TAG */
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#define CONFIG_SERIAL_TAG
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#define CONFIG_DFU_ENV_SETTINGS \
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"dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_DFU_ENV_SETTINGS \
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"script=boot.scr\0" \
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"script_signed=boot.scr.imx-signed\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"ethact=usb_ether\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx7s-warp.dtb\0" \
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"fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \
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"optee_addr=" __stringify(CONFIG_OPTEE_LOAD_ADDR)"\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \
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"finduuid=part uuid mmc 0:${rootpart} uuid\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=PARTUUID=${uuid} rootwait rw\0" \
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"ivt_offset=" __stringify(BOOTROM_IVT_HDR_OFFSET)"\0"\
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"warp7_auth_or_fail=hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0;\0" \
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"do_bootscript_hab=" \
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"if test ${hab_enabled} -eq 1; then " \
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"setexpr hab_ivt_addr ${loadaddr} - ${ivt_offset}; " \
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"setenv script ${script_signed}; " \
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"load mmc ${mmcdev}:${mmcpart} ${hab_ivt_addr} ${script}; " \
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"run warp7_auth_or_fail; " \
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"run bootscript; "\
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"fi;\0" \
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"loadbootscript=" \
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"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run finduuid; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"run do_bootscript_hab;" \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"fi; " \
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"fi; " \
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"fi"
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* I2C configs */
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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/* environment organization */
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 0
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
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#define CONFIG_IMX_THERMAL
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#define CONFIG_USBD_HS
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/* USB Device Firmware Update support */
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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#define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01"
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/* Environment variable name to represent HAB enable state */
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#define HAB_ENABLED_ENVNAME "hab_enabled"
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#endif
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