mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-24 20:54:24 +08:00
49822e23a0
- DDR Ram support for PM520 (MPC5200) - support for different flash types (PM520) - USB / IDE / CF-Card / DiskOnChip support for PM520 - 8 bit boot rom support for PM520/CE520 - Add auto SDRAM module detection for MicroSys CPC45 board (MPC8245) - I2C and RTC support for CPC45 - support of new flash type (28F160C3T) for CPC45
523 lines
12 KiB
C
523 lines
12 KiB
C
/*
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* (C) Copyright 2001-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc824x.h>
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#include <asm/processor.h>
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#if defined(CFG_ENV_IS_IN_FLASH)
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# ifndef CFG_ENV_ADDR
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# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
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# endif
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# ifndef CFG_ENV_SIZE
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# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
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# endif
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# ifndef CFG_ENV_SECT_SIZE
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# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
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# endif
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#endif
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#define FLASH_BANK_SIZE 0x800000
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#define MAIN_SECT_SIZE 0x40000
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#define PARAM_SECT_SIZE 0x8000
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
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static int write_data (flash_info_t * info, ulong dest, ulong * data);
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static void write_via_fpu (vu_long * addr, ulong * data);
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static __inline__ unsigned long get_msr (void);
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static __inline__ void set_msr (unsigned long msr);
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/*---------------------------------------------------------------------*/
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#undef DEBUG_FLASH
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/*---------------------------------------------------------------------*/
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#ifdef DEBUG_FLASH
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#define DEBUGF(fmt,args...) printf(fmt ,##args)
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#else
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#define DEBUGF(fmt,args...)
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#endif
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/*---------------------------------------------------------------------*/
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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{
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int i, j;
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ulong size = 0;
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uchar tempChar;
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vu_long *tmpaddr;
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/* Enable flash writes on CPC45 */
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tempChar = BOARD_CTRL;
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tempChar |= (B_CTRL_FWPT_1 | B_CTRL_FWRE_1);
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tempChar &= ~(B_CTRL_FWPT_0 | B_CTRL_FWRE_0);
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BOARD_CTRL = tempChar;
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__asm__ volatile ("sync\n eieio");
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
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vu_long *addr = (vu_long *) (CFG_FLASH_BASE + i * FLASH_BANK_SIZE);
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addr[0] = 0x00900090;
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__asm__ volatile ("sync\n eieio");
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udelay (100);
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DEBUGF ("Flash bank # %d:\n"
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"\tManuf. ID @ 0x%08lX: 0x%08lX\n"
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"\tDevice ID @ 0x%08lX: 0x%08lX\n",
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i,
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(ulong) (&addr[0]), addr[0],
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(ulong) (&addr[2]), addr[2]);
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if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
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(addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3T)) {
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flash_info[i].flash_id =
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(FLASH_MAN_INTEL & FLASH_VENDMASK) |
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(INTEL_ID_28F160F3T & FLASH_TYPEMASK);
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} else if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT)
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&& (addr[2] == addr[3])
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&& (addr[2] == INTEL_ID_28F160C3T)) {
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flash_info[i].flash_id =
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(FLASH_MAN_INTEL & FLASH_VENDMASK) |
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(INTEL_ID_28F160C3T & FLASH_TYPEMASK);
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} else {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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addr[0] = 0xFFFFFFFF;
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goto Done;
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}
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DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
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addr[0] = 0xFFFFFFFF;
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flash_info[i].size = FLASH_BANK_SIZE;
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flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
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memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
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for (j = 0; j < flash_info[i].sector_count; j++) {
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if (j > 30) {
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flash_info[i].start[j] = CFG_FLASH_BASE +
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i * FLASH_BANK_SIZE +
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(MAIN_SECT_SIZE * 31) + (j -
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31) *
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PARAM_SECT_SIZE;
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} else {
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flash_info[i].start[j] = CFG_FLASH_BASE +
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i * FLASH_BANK_SIZE +
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j * MAIN_SECT_SIZE;
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}
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}
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/* unlock sectors, if 160C3T */
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for (j = 0; j < flash_info[i].sector_count; j++) {
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tmpaddr = (vu_long *) flash_info[i].start[j];
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if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
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(INTEL_ID_28F160C3T & FLASH_TYPEMASK)) {
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tmpaddr[0] = 0x00600060;
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tmpaddr[0] = 0x00D000D0;
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tmpaddr[1] = 0x00600060;
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tmpaddr[1] = 0x00D000D0;
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}
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}
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size += flash_info[i].size;
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addr[0] = 0x00FF00FF;
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addr[1] = 0x00FF00FF;
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}
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/* Protect monitor and environment sectors
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*/
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE
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flash_protect (FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[1]);
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#else
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flash_protect (FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[0]);
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#endif
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#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
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#if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE
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flash_protect (FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]);
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#else
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flash_protect (FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
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#endif
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#endif
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Done:
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t * info)
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{
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int i;
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switch ((i = info->flash_id & FLASH_VENDMASK)) {
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case (FLASH_MAN_INTEL & FLASH_VENDMASK):
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printf ("Intel: ");
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break;
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default:
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printf ("Unknown Vendor 0x%04x ", i);
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break;
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}
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switch ((i = info->flash_id & FLASH_TYPEMASK)) {
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case (INTEL_ID_28F160F3T & FLASH_TYPEMASK):
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printf ("28F160F3T (16Mbit)\n");
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break;
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case (INTEL_ID_28F160C3T & FLASH_TYPEMASK):
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printf ("28F160C3T (16Mbit)\n");
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break;
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default:
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printf ("Unknown Chip Type 0x%04x\n", i);
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goto Done;
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 5) == 0) {
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printf ("\n ");
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}
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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Done:
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return;
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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int flag, prot, sect;
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ulong start, now, last;
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DEBUGF ("Erase flash bank %d sect %d ... %d\n",
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info - &flash_info[0], s_first, s_last);
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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if ((info->flash_id & FLASH_VENDMASK) !=
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(FLASH_MAN_INTEL & FLASH_VENDMASK)) {
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printf ("Can erase only Intel flash types - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n", prot);
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} else {
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printf ("\n");
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}
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start = get_timer (0);
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last = start;
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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vu_long *addr = (vu_long *) (info->start[sect]);
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DEBUGF ("Erase sect %d @ 0x%08lX\n",
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sect, (ulong) addr);
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/* Disable interrupts which might cause a timeout
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* here.
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*/
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flag = disable_interrupts ();
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addr[0] = 0x00500050; /* clear status register */
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addr[0] = 0x00200020; /* erase setup */
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addr[0] = 0x00D000D0; /* erase confirm */
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addr[1] = 0x00500050; /* clear status register */
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addr[1] = 0x00200020; /* erase setup */
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addr[1] = 0x00D000D0; /* erase confirm */
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts ();
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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while (((addr[0] & 0x00800080) != 0x00800080) ||
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((addr[1] & 0x00800080) != 0x00800080)) {
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if ((now = get_timer (start)) >
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CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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addr[0] = 0x00B000B0; /* suspend erase */
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addr[0] = 0x00FF00FF; /* to read mode */
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return 1;
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}
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/* show that we're waiting */
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if ((now - last) > 1000) { /* every second */
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putc ('.');
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last = now;
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}
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}
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addr[0] = 0x00FF00FF;
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}
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}
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printf (" done\n");
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return 0;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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* 4 - Flash not identified
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*/
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#define FLASH_WIDTH 8 /* flash bus width in bytes */
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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ulong wp, cp, msr;
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int l, rc, i;
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ulong data[2];
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ulong *datah = &data[0];
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ulong *datal = &data[1];
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DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
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addr, (ulong) src, cnt);
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if (info->flash_id == FLASH_UNKNOWN) {
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return 4;
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}
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msr = get_msr ();
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set_msr (msr | MSR_FP);
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wp = (addr & ~(FLASH_WIDTH - 1)); /* get lower aligned address */
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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*datah = *datal = 0;
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for (i = 0, cp = wp; i < l; i++, cp++) {
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if (i >= 4) {
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*datah = (*datah << 8) |
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((*datal & 0xFF000000) >> 24);
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}
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*datal = (*datal << 8) | (*(uchar *) cp);
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}
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for (; i < FLASH_WIDTH && cnt > 0; ++i) {
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char tmp = *src++;
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if (i >= 4) {
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*datah = (*datah << 8) |
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((*datal & 0xFF000000) >> 24);
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}
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*datal = (*datal << 8) | tmp;
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--cnt;
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++cp;
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}
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for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
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if (i >= 4) {
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*datah = (*datah << 8) |
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((*datal & 0xFF000000) >> 24);
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}
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*datal = (*datah << 8) | (*(uchar *) cp);
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}
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if ((rc = write_data (info, wp, data)) != 0) {
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set_msr (msr);
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return (rc);
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}
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wp += FLASH_WIDTH;
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}
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/*
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* handle FLASH_WIDTH aligned part
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*/
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while (cnt >= FLASH_WIDTH) {
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*datah = *(ulong *) src;
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*datal = *(ulong *) (src + 4);
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if ((rc = write_data (info, wp, data)) != 0) {
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set_msr (msr);
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return (rc);
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}
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wp += FLASH_WIDTH;
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cnt -= FLASH_WIDTH;
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src += FLASH_WIDTH;
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}
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if (cnt == 0) {
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set_msr (msr);
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return (0);
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}
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/*
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* handle unaligned tail bytes
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*/
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*datah = *datal = 0;
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for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
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char tmp = *src++;
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if (i >= 4) {
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*datah = (*datah << 8) | ((*datal & 0xFF000000) >>
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24);
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}
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*datal = (*datal << 8) | tmp;
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--cnt;
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}
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for (; i < FLASH_WIDTH; ++i, ++cp) {
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if (i >= 4) {
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*datah = (*datah << 8) | ((*datal & 0xFF000000) >>
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24);
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}
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*datal = (*datal << 8) | (*(uchar *) cp);
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}
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rc = write_data (info, wp, data);
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set_msr (msr);
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return (rc);
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}
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/*-----------------------------------------------------------------------
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* Write a word to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_data (flash_info_t * info, ulong dest, ulong * data)
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{
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vu_long *addr = (vu_long *) dest;
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ulong start;
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int flag;
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/* Check if Flash is (sufficiently) erased */
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if (((addr[0] & data[0]) != data[0]) ||
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((addr[1] & data[1]) != data[1])) {
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return (2);
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}
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts ();
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addr[0] = 0x00400040; /* write setup */
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write_via_fpu (addr, data);
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts ();
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start = get_timer (0);
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while (((addr[0] & 0x00800080) != 0x00800080) ||
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((addr[1] & 0x00800080) != 0x00800080)) {
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if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
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addr[0] = 0x00FF00FF; /* restore read mode */
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return (1);
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}
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}
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addr[0] = 0x00FF00FF; /* restore read mode */
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return (0);
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}
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/*-----------------------------------------------------------------------
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*/
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static void write_via_fpu (vu_long * addr, ulong * data)
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{
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__asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
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__asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
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}
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/*-----------------------------------------------------------------------
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*/
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static __inline__ unsigned long get_msr (void)
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{
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unsigned long msr;
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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return msr;
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}
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static __inline__ void set_msr (unsigned long msr)
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{
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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}
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