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6a411dd0d2
BOOTP_DEFAULT is defined in several boards, but this config option is never checked or used. This patch removes this config option from config files and the whitelist.txt Signed-off-by: Adam Ford <aford173@gmail.com>
271 lines
7.7 KiB
C
271 lines
7.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* am43xx_evm.h
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#ifndef __CONFIG_AM43XX_EVM_H
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#define __CONFIG_AM43XX_EVM_H
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#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#include <asm/arch/omap.h>
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550_CLK 48000000
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#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_SERIAL
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#endif
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/* I2C Configuration */
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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/* Power */
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#ifndef CONFIG_DM_I2C
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#endif
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#define CONFIG_POWER_TPS65218
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#define CONFIG_POWER_TPS62362
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/* SPL defines. */
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
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(128 << 20))
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/* Enabling L2 Cache */
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0x48242000
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/*
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* Since SPL did pll and ddr initialization for us,
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* we don't need to do it twice.
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*/
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#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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/*
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* When building U-Boot such that there is no previous loader
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* we need to call board_early_init_f. This is taken care of in
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* s_init when we have SPL used.
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*/
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/* Now bring in the rest of the common code. */
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#include <configs/ti_armv7_omap.h>
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/* Clock Defines */
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#define V_OSCK 24000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK)
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
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/* SPL USB Support */
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#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
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#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
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#define CONFIG_USB_XHCI_OMAP
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#define CONFIG_AM437X_USB2PHY2_HOST
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#endif
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#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER)
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#undef CONFIG_USB_DWC3_PHY_OMAP
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#undef CONFIG_USB_DWC3_OMAP
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#undef CONFIG_USB_DWC3
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#undef CONFIG_USB_DWC3_GADGET
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#undef CONFIG_USB_GADGET_DOWNLOAD
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#undef CONFIG_USB_GADGET_VBUS_DRAW
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#undef CONFIG_USB_GADGET_MANUFACTURER
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#undef CONFIG_USB_GADGET_VENDOR_NUM
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#undef CONFIG_USB_GADGET_PRODUCT_NUM
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#undef CONFIG_USB_GADGET_DUALSPEED
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#endif
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/*
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* Disable MMC DM for SPL build and can be re-enabled after adding
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* DM support in SPL
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*/
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#ifdef CONFIG_SPL_BUILD
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#undef CONFIG_TIMER
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#endif
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#ifndef CONFIG_SPL_BUILD
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/* USB Device Firmware Update support */
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#define DFUARGS \
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"dfu_bufsiz=0x10000\0" \
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DFU_ALT_INFO_MMC \
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DFU_ALT_INFO_EMMC \
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DFU_ALT_INFO_RAM \
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DFU_ALT_INFO_QSPI_XIP
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#else
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#define DFUARGS
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#endif
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#ifndef CONFIG_SPL_BUILD
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#include <environment/ti/dfu.h>
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#include <environment/ti/mmc.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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DEFAULT_LINUX_BOOT_ENV \
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DEFAULT_MMC_TI_ARGS \
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DEFAULT_FIT_TI_ARGS \
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"fdtfile=undefined\0" \
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"bootpart=0:2\0" \
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"bootdir=/boot\0" \
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"bootfile=zImage\0" \
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"console=ttyO0,115200n8\0" \
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"partitions=" \
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"uuid_disk=${uuid_gpt_disk};" \
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"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
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"optargs=\0" \
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"usbroot=/dev/sda2 rw\0" \
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"usbrootfstype=ext4 rootwait\0" \
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"usbdev=0\0" \
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"ramroot=/dev/ram0 rw\0" \
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"ramrootfstype=ext2\0" \
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"usbargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${usbroot} " \
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"rootfstype=${usbrootfstype}\0" \
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"ramargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${ramroot} " \
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"rootfstype=${ramrootfstype}\0" \
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"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
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"usbboot=" \
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"setenv devnum ${usbdev}; " \
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"setenv devtype usb; " \
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"usb start ${usbdev}; " \
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"if usb dev ${usbdev}; then " \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loadimage; then " \
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"run loadfdt; " \
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"echo Booting from usb ${usbdev}...; " \
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"run usbargs;" \
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"bootz ${loadaddr} - ${fdtaddr}; " \
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"fi;" \
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"fi\0" \
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"fi;" \
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"usb stop ${usbdev};\0" \
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"findfdt="\
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"if test $board_name = AM43EPOS; then " \
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"setenv fdtfile am43x-epos-evm.dtb; fi; " \
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"if test $board_name = AM43__GP; then " \
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"setenv fdtfile am437x-gp-evm.dtb; fi; " \
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"if test $board_name = AM43XXHS; then " \
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"setenv fdtfile am437x-gp-evm.dtb; fi; " \
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"if test $board_name = AM43__SK; then " \
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"setenv fdtfile am437x-sk-evm.dtb; fi; " \
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"if test $board_name = AM43_IDK; then " \
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"setenv fdtfile am437x-idk-evm.dtb; fi; " \
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"if test $fdtfile = undefined; then " \
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"echo WARNING: Could not determine device tree; fi; \0" \
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NANDARGS \
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NETARGS \
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DFUARGS \
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#define CONFIG_BOOTCOMMAND \
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"if test ${boot_fit} -eq 1; then " \
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"run update_to_fit;" \
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"fi;" \
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"run findfdt; " \
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"run envboot;" \
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"run mmcboot;" \
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"run usbboot;" \
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NANDBOOT \
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#endif
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#ifndef CONFIG_SPL_BUILD
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/* CPSW Ethernet */
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#define CONFIG_NET_RETRY_COUNT 10
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#endif
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#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
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#define CONFIG_SYS_RX_ETH_BUFFER 64
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/* NAND support */
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#ifdef CONFIG_MTD_RAW_NAND
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/* NAND: device related configs */
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#define CONFIG_SYS_NAND_PAGE_SIZE 4096
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#define CONFIG_SYS_NAND_OOBSIZE 224
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#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024)
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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/* NAND: driver related configs */
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
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20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
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30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
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40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
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60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
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70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
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80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
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90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
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100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
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110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
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120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
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130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
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140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
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150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
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160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
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170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
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180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
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190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
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200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
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}
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 26
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
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/* NAND: SPL related configs */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
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#endif
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#define NANDARGS \
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"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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"nandargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
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"nandrootfstype=ubifs rootwait=1\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
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"nand read ${loadaddr} NAND.kernel; " \
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"bootz ${loadaddr} - ${fdtaddr}\0"
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#define NANDBOOT "run nandboot; "
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#else /* !CONFIG_MTD_RAW_NAND */
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#define NANDARGS
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#define NANDBOOT
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#endif /* CONFIG_MTD_RAW_NAND */
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#if defined(CONFIG_TI_SECURE_DEVICE)
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/* Avoid relocating onto firewalled area at end of DRAM */
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#define CONFIG_PRAM (64 * 1024)
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#endif /* CONFIG_TI_SECURE_DEVICE */
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#endif /* __CONFIG_AM43XX_EVM_H */
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