u-boot/configs/chromebook_jerry_defconfig
Anatolij Gustschin 2cc393f32f video: make BPP and ANSI configs optional
Many boards do not use all selected framebuffer depth
configurations, for such boards there is some unused
code in video and console uclass routines. Make depth
specific code optional to avoid dead code and slightly
reduce binary size. Also make ANSI code optional for
the same reason. When i.e. using only VIDEO_BPP16 the
code size shrinks (below values when using gcc-7.3.0):

  $ ./tools/buildman/buildman -b video-wip -sS wandboard
  ...
  01: Merge git://git.denx.de/u-boot-sh
  02: video: add guards around 16bpp/32bbp code
  03: video: make BPP and ANSI configs optional
         arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2019-12-06 16:38:51 +01:00

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CONFIG_ARM=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_USE_PREBOOT=y
CONFIG_SILENT_CONSOLE=y
CONFIG_LOG=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_CRC32_SUPPORT is not set
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_SOUND=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_OF_PLATDATA=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
# CONFIG_SPL_BLK is not set
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
CONFIG_PWRSEQ=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINMUX is not set
CONFIG_SPL_PINCONF=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK8XX=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_ROCKCHIP=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_DWC2=y
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_EDP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
CONFIG_SPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y