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https://github.com/u-boot/u-boot.git
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b0cadb35da
Currently the following memory layout is typically used on RK3588: [ 0, 256K) - SPL binary [ 256K, 2M) - TF-A / reserved [ -X, 4M) - SPL pre-reloc stack (SPL_STACK) [ 3.5M, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN) [ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR) [ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN) [ 10M, +X) - U-Boot proper binary (TEXT_BASE) [ -X, 12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR) [11.5M, 12M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN) [ 64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE) SPL can safely load U-Boot proper + FDT to [10M, 11.5M) with this layout. However, on ROCK 5A the SPL stacks is overlapping: [ -X, 16M) - SPL pre-reloc stack (SPL_STACK) [15.5M, 16M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN) [ -X, 16M) - SPL reloc stack (SPL_STACK_R_ADDR) [ 15M, 16M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN) Because bind and probe udevice instanses is allocated on the pre-reloc malloc heap, there is going to be an overlap when reloc malloc heap reaches close to 512 KiB of usage. Migrate to use common bss, stack and malloc heap size and addresses to mitigate these limitations and allow for a larger U-Boot proper size. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Update for new boards defconfig) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
96 lines
2.4 KiB
Plaintext
96 lines
2.4 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_SYS_HAS_NONCACHED_MEMORY=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SF_DEFAULT_MODE=0x2000
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CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6"
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CONFIG_ROCKCHIP_RK3588=y
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CONFIG_ROCKCHIP_SPI_IMAGE=y
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CONFIG_SPL_SERIAL=y
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CONFIG_TARGET_NANOPCT6_RK3588=y
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CONFIG_DEBUG_UART_BASE=0xFEB50000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_SYS_LOAD_ADDR=0xc00800
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CONFIG_PCI=y
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_FIT_SIGNATURE=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_LEGACY_IMAGE_FORMAT=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x40000
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CONFIG_SPL_PAD_TO=0x7f8000
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
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CONFIG_SPL_ATF=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_REGULATOR=y
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# CONFIG_SPL_DOS_PARTITION is not set
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SPL_SYSCON=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MISC=y
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CONFIG_SUPPORT_EMMC_RPMB=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_SF_DEFAULT_BUS=5
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_XTX=y
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CONFIG_PHYLIB=y
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CONFIG_RTL8169=y
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CONFIG_NVME_PCI=y
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CONFIG_PCIE_DW_ROCKCHIP=y
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CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
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CONFIG_PHY_ROCKCHIP_USBDP=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_SPL_RAM=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550_MEM32=y
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CONFIG_ROCKCHIP_SFC=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_GENERIC=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_GENERIC=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_ASIX=y
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CONFIG_USB_ETHER_ASIX88179=y
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CONFIG_USB_ETHER_MCS7830=y
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CONFIG_USB_ETHER_RTL8152=y
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CONFIG_USB_ETHER_SMSC95XX=y
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CONFIG_ERRNO_STR=y
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