Lei Wen abbbbdd7e1 armada100: define CONFIG_SYS_CACHELINE_SIZE ... By default, on Armada100 SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen <leiwen@marvell.com>		2011-11-03 22:56:22 +01:00
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arm	armada100: define CONFIG_SYS_CACHELINE_SIZE	2011-11-03 22:56:22 +01:00
avr32	avr32: Use getenv_ulong() in place of getenv(), strtoul	2011-10-23 23:33:17 +02:00
blackfin	blackfin: Use getenv_ulong() in place of getenv(), strtoul	2011-10-23 23:33:18 +02:00
m68k	m68k: Use getenv_ulong() in place of getenv(), strtoul	2011-10-23 23:33:18 +02:00
microblaze	microblaze: Fix strict-aliasing rules for in_be32	2011-10-24 07:57:03 +02:00
mips	mips: Use getenv_ulong() in place of getenv(), strtoul	2011-10-23 23:33:19 +02:00
nds32	nds32: asm/io.h: add __iormb __iowmb and inline io support	2011-11-01 12:47:30 +08:00
nios2	nios2: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment	2011-10-23 20:50:42 +02:00
powerpc	Reduce build times	2011-11-03 20:44:58 +01:00
sandbox	sandbox: drop unused return	2011-11-03 22:35:25 +01:00
sh	cosmetic: s/BOARD_LATE_INIT/CONFIG_BOARD_LATE_INIT	2011-10-27 23:53:59 +02:00
sparc	sparc: Use getenv_ulong() in place of getenv(), strtoul	2011-10-23 23:33:19 +02:00
x86	Reduce build times	2011-11-03 20:44:58 +01:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00