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cdaa69c46e
Init GICv3 for V3U Falcon in early phase Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
37 lines
776 B
C
37 lines
776 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* include/configs/falcon.h
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* This file is Falcon board configuration.
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*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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#ifndef __FALCON_H
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#define __FALCON_H
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#include "rcar-gen3-common.h"
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/* Generic Interrupt Controller Definitions */
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#ifdef CONFIG_GICV2
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#undef CONFIG_GICV2
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#undef GICD_BASE
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#undef GICC_BASE
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#undef GICR_BASE
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#endif
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#define CONFIG_GICV3
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#define GICD_BASE 0xF1000000
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#define GICR_BASE 0xF1060000
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/* Ethernet RAVB */
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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/* XTAL_CLK : 16.66MHz */
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#define CONFIG_SYS_CLK_FREQ 16666666u
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/* Generic Timer Definitions (use in assembler source) */
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#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
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#endif /* __FALCON_H */
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