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c0dcece7d9
add support for the am335x based boards from siemens: dxr2: - DDR3 128MiB - NAND 256MiB - Ethernet with external Switch SMSC LAN9303 - no PMIC - internal Watchdog - DFU support pxm2: - DDR2 512 MiB - NAND 1024 MiB - PMIC - PHY atheros ar803x - USB Host - internal Watchdog - DFU support rut: - DDR3 256 MiB - NAND 256 MiB - PMIC - PHY natsemi dp83630 - external Watchdog - DFU support Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Roger Meier <r.meier@siemens.com> Signed-off-by: Samuel Egli <samuel.egli@siemens.com> Cc: Pascal Bach <pascal.bach@siemens.com> Cc: Tom Rini <trini@ti.com>
157 lines
3.7 KiB
C
157 lines
3.7 KiB
C
/*
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* siemens rut
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* (C) Copyright 2013 Siemens Schweiz AG
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* (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* U-Boot file:/include/configs/am335x_evm.h
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RUT_H
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#define __CONFIG_RUT_H
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#define CONFIG_SIEMENS_RUT
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#define MACH_TYPE_RUT 4316
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#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
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#include "siemens-am33x-common.h"
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#define CONFIG_SYS_MPUCLK 600
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#define RUT_IOCTRL_VAL 0x18b
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#define DDR_PLL_FREQ 303
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/* Physical Memory Map */
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#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
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/* I2C Configuration */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200
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#undef CONFIG_SPL_NET_SUPPORT
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#undef CONFIG_SPL_NET_VCI_STRING
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#undef CONFIG_SPL_ETH_SUPPORT
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#define CONFIG_PHY_ADDR 1
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#define CONFIG_PHY_NATSEMI
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#define CONFIG_FACTORYSET
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/* UBI Support */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#endif
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/* Watchdog */
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#define WATCHDOG_TRIGGER_GPIO 14
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#ifndef CONFIG_SPL_BUILD
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/* Default env settings */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"hostname=rut\0" \
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"splashpos=488,352\0" \
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"optargs=fixrtc --no-log consoleblank=0 \0" \
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CONFIG_COMMON_ENV_SETTINGS \
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"mmc_dev=0\0" \
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"mmc_root=/dev/mmcblk0p2 rw\0" \
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"mmc_root_fs_type=ext4 rootwait\0" \
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"mmc_load_uimage=" \
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"mmc rescan; " \
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"setenv bootfile uImage;" \
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"fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
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"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t $loadaddr $filesize\0" \
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"mmc_args=run bootargs_defaults;" \
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"mtdparts default;" \
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"setenv bootargs ${bootargs} " \
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"root=${mmc_root} ${mtdparts}" \
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"rootfstype=${mmc_root_fs_type} ip=${ip_method} " \
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"eth=${ethaddr} " \
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"\0" \
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"mmc_boot=run mmc_args; " \
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"run mmc_load_uimage; " \
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"bootm ${kloadaddr}\0" \
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""
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#ifndef CONFIG_RESTORE_FLASH
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/* set to negative value for no autoboot */
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTCOMMAND \
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"if mmc rescan; then " \
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"echo SD/MMC found on device ${mmc_dev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run mmc_load_uimage; then " \
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"run mmc_args;" \
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"bootm ${kloadaddr};" \
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"fi;" \
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"fi;" \
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"run nand_boot;" \
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"if ping ${serverip}; then " \
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"run net_nfs; " \
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"fi; "
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#else
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#define CONFIG_BOOTDELAY 0
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#define CONFIG_BOOTCOMMAND \
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"setenv autoload no; " \
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"dhcp; " \
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"if tftp 80000000 debrick.scr; then " \
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"source 80000000; " \
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"fi"
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#endif
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#endif /* CONFIG_SPL_BUILD */
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#ifdef CONFIG_SPL_BUILD
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#undef CONFIG_HW_WATCHDOG
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#endif
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#define CONFIG_VIDEO
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#if defined(CONFIG_VIDEO)
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#define CONFIG_VIDEO_DA8XX
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_CMD_BMP
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#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
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#define CONFIG_SPI
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#define CONFIG_OMAP3_SPI
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#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
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#define CONFIG_ARCH_EARLY_INIT_R
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#define CONFIG_FORMIKE
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#endif
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#endif /* ! __CONFIG_RUT_H */
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