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60179098a9
Renesas SH7763 has 3 SCIF, MMC, LCDC, Ethernet and other. This patch supprts CPU register's header file. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
/*
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* Copyright (C) 2008 Renesas Solutions Corp.
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* Copyright (C) 2007,2008 Nobuhiro Iwamatsu
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_CPU_SH7763_H_
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#define _ASM_CPU_SH7763_H_
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/* CACHE */
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#define CACHE_OC_NUM_WAYS 1
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#define CCR 0xFF00001C
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#define CCR_CACHE_INIT 0x0000090b
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/* SCIF */
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/* SCIF0 */
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#define SCIF0_BASE SCSMR0
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#define SCSMR0 0xFFE00000
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/* SCIF1 */
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#define SCIF1_BASE SCSMR1
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#define SCSMR1 0xFFE08000
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/* SCIF2 */
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#define SCIF2_BASE SCSMR2
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#define SCSMR2 0xFFE10000
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/* Watchdog Timer */
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#define WTCNT WDTST
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#define WDTST 0xFFCC0000
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/* TMU */
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#define TSTR 0xFFD80004
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#define TCOR0 0xFFD80008
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#define TCNT0 0xFFD8000C
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#define TCR0 0xFFD80010
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#endif /* _ASM_CPU_SH7763_H_ */
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