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a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
283 lines
8.1 KiB
C
283 lines
8.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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/*
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* TQM8349 board configuration file
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_E300 1 /* E300 Family */
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/* board pre init: do not call, nothing to do */
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/* detect the number of flash banks */
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/*
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* DDR Setup
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*/
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/* DDR is system memory*/
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define DDR_CASLAT_25 /* CASLAT set to 2.5 */
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#undef CONFIG_DDR_ECC /* only for ECC DDR module */
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#undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup */
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#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
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#define CONFIG_SYS_MEMTEST_END 0x00100000
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/*
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* FLASH on the Local Bus
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*/
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#undef CONFIG_SYS_FLASH_CHECKSUM
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#define CONFIG_SYS_FLASH_BASE 0x80000000 /* start of FLASH */
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#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size in MB */
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sectors */
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/*
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* FLASH bank number detection
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*/
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/*
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* When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, the actual number of
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* Flash banks has to be determined at runtime and stored in a gloabl variable
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* tqm834x_num_flash_banks. The value of CONFIG_SYS_MAX_FLASH_BANKS_DETECT is
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* only used instead of CONFIG_SYS_MAX_FLASH_BANKS to allocate the array
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* flash_info, and should be made sufficiently large to accomodate the number
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* of banks that might actually be detected. Since most (all?) Flash related
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* functions use CONFIG_SYS_MAX_FLASH_BANKS as the number of actual banks on
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* the board, it is defined as tqm834x_num_flash_banks.
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */
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/* disable remaining mappings */
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#define CONFIG_SYS_BR1_PRELIM 0x00000000
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#define CONFIG_SYS_OR1_PRELIM 0x00000000
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#define CONFIG_SYS_BR2_PRELIM 0x00000000
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#define CONFIG_SYS_OR2_PRELIM 0x00000000
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#define CONFIG_SYS_BR3_PRELIM 0x00000000
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#define CONFIG_SYS_OR3_PRELIM 0x00000000
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/*
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* Monitor config
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*/
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
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#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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# define CONFIG_SYS_RAMBOOT
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#else
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# undef CONFIG_SYS_RAMBOOT
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#endif
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#define CONFIG_SYS_INIT_RAM_LOCK 1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/
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#define CONFIG_SYS_GBL_DATA_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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/* Reserve 384 kB = 3 sect. for Mon */
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#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
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/* Reserve 512 kB for malloc */
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#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
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/*
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* Serial Port
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
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#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
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#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
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/*
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* I2C
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_FSL
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#define CONFIG_SYS_FSL_I2C_SPEED 400000
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#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
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#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
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/* I2C EEPROM, configuration for onboard EEPROMs 24C256 and 24C32 */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32 bytes/write */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 /* 10ms +/- 20% */
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/* I2C RTC */
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#define CONFIG_RTC_DS1337 /* use ds1337 rtc via i2c */
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
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/*
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* TSEC
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*/
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#define CONFIG_SYS_TSEC1_OFFSET 0x24000
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#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
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#define CONFIG_SYS_TSEC2_OFFSET 0x25000
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#define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC2_OFFSET)
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#if defined(CONFIG_TSEC_ENET)
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#define CONFIG_TSEC1 1
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#define CONFIG_TSEC1_NAME "TSEC0"
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#define CONFIG_TSEC2 1
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#define CONFIG_TSEC2_NAME "TSEC1"
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#define TSEC1_PHY_ADDR 2
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#define TSEC2_PHY_ADDR 1
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#define TSEC1_PHYIDX 0
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#define TSEC2_PHYIDX 0
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#define TSEC1_FLAGS TSEC_GIGABIT
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#define TSEC2_FLAGS TSEC_GIGABIT
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/* Options are: TSEC[0-1] */
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#define CONFIG_ETHPRIME "TSEC0"
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#endif /* CONFIG_TSEC_ENET */
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#if defined(CONFIG_PCI)
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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/* PCI1 host bridge */
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#define CONFIG_SYS_PCI1_MEM_BASE 0x90000000
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#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
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#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI1_MMIO_BASE \
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(CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
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#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE
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#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI1_IO_BASE 0xe2000000
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#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE
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#define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */
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#undef CONFIG_EEPRO100
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#define CONFIG_EEPRO100
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#undef CONFIG_TULIP
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#if !defined(CONFIG_PCI_PNP)
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#define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BASE
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#define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_MEM_BASE
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#define PCI_IDSEL_NUMBER 0x1c /* slot0 (IDSEL) = 28 */
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#endif
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#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */
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#endif /* CONFIG_PCI */
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/*
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* Environment
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*/
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 256 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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/* Initial Memory map for Linux */
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#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
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/* System IO Config */
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#define CONFIG_SYS_SICRH 0
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#define CONFIG_SYS_SICRL SICRL_LDP_A
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/* PCI */
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#ifdef CONFIG_PCI
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#define CONFIG_PCI_INDIRECT_BRIDGE
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#endif
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
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#endif
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/*
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* Environment Configuration
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*/
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/* default location for tftp and bootm */
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#define CONFIG_LOADADDR 400000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"hostname=tqm834x\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
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"flash_nfs_old=run nfsargs addip addcons;" \
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"bootm ${kernel_addr}\0" \
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"flash_nfs=run nfsargs addip addcons;" \
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"bootm ${kernel_addr} - ${fdt_addr}\0" \
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"flash_self_old=run ramargs addip addcons;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"flash_self=run ramargs addip addcons;" \
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"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
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"net_nfs_old=tftp 400000 ${bootfile};" \
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"run nfsargs addip addcons;bootm\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"tftp ${fdt_addr_r} ${fdt_file}; " \
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"run nfsargs addip addcons; " \
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"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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"rootpath=/opt/eldk/ppc_6xx\0" \
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"bootfile=tqm834x/uImage\0" \
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"fdtfile=tqm834x/tqm834x.dtb\0" \
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"kernel_addr_r=400000\0" \
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"fdt_addr_r=600000\0" \
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"ramdisk_addr_r=800000\0" \
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"kernel_addr=800C0000\0" \
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"fdt_addr=800A0000\0" \
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"ramdisk_addr=80300000\0" \
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"u-boot=tqm834x/u-boot.bin\0" \
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"load=tftp 200000 ${u-boot}\0" \
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"update=protect off 80000000 +${filesize};" \
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"era 80000000 +${filesize};" \
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"cp.b 200000 80000000 ${filesize}\0" \
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"upd=run load update\0" \
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""
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#define CONFIG_BOOTCOMMAND "run flash_self"
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/*
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* JFFS2 partitions
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*/
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/* mtdparts command line support */
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/* default mtd partition table */
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#endif /* __CONFIG_H */
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