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57966101c8
Add the tlb entries based on the configuration of the SRIO interfaces. Every SRIO interface has 256M space: #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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b4860qds_crossbar_con.h | ||
b4860qds_qixis.h | ||
b4860qds.c | ||
b4860qds.h | ||
ddr.c | ||
eth_b4860qds.c | ||
law.c | ||
Makefile | ||
pci.c | ||
tlb.c |