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9c17a32591
This patch have changed mipi dsi write functions' parameters correctly so that type cast operations were removed. And mipi dsi payload is composed with array of panel commands to improve readability. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
266 lines
7.2 KiB
C
266 lines
7.2 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics
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*
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* Author: Donghwa Lee <dh09.lee@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/mipi_dsim.h>
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#include "exynos_mipi_dsi_lowlevel.h"
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#include "exynos_mipi_dsi_common.h"
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static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
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static const unsigned char data_to_send[] = {
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0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
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0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
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0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
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0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
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0xff, 0xff, 0xc8
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};
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static const unsigned char data_to_send_reverse[] = {
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0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
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0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
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0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
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0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
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0xf6, 0xf6, 0xc1
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};
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if (reverse) {
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send_reverse,
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ARRAY_SIZE(data_to_send_reverse));
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} else {
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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}
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static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xf2, 0x80, 0x03, 0x0d
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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/* 7500K 2.2 Set : 30cd */
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static const unsigned char data_to_send[] = {
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0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
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0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
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0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xf7, 0x03
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
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ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xf6, 0x00, 0x02, 0x00
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
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0x00
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xe3, 0x40
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
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ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xb1, 0x04, 0x00
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0x29, 0x00
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
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ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0x11, 0x00
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
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ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xf0, 0x5a, 0x5a
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
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{
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struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
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static const unsigned char data_to_send[] = {
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0xf1, 0x5a, 0x5a
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};
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ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
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data_to_send, ARRAY_SIZE(data_to_send));
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}
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static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
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{
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/*
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* in case of setting gamma and panel condition at first,
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* it shuold be setting like below.
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* set_gamma() -> set_panel_condition()
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*/
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s6e8ax0_apply_level1_key(dsim_dev);
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s6e8ax0_apply_mtp_key(dsim_dev);
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s6e8ax0_sleep_out(dsim_dev);
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mdelay(5);
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s6e8ax0_panel_cond(dsim_dev);
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s6e8ax0_display_cond(dsim_dev);
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s6e8ax0_gamma_cond(dsim_dev);
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s6e8ax0_gamma_update(dsim_dev);
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s6e8ax0_etc_source_control(dsim_dev);
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s6e8ax0_elvss_set(dsim_dev);
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s6e8ax0_etc_pentile_control(dsim_dev);
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s6e8ax0_etc_mipi_control1(dsim_dev);
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s6e8ax0_etc_mipi_control2(dsim_dev);
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s6e8ax0_etc_power_control(dsim_dev);
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s6e8ax0_etc_mipi_control3(dsim_dev);
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s6e8ax0_etc_mipi_control4(dsim_dev);
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}
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static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
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{
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s6e8ax0_panel_init(dsim_dev);
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return 0;
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}
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static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
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{
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s6e8ax0_display_on(dsim_dev);
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}
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static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
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.name = "s6e8ax0",
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.id = -1,
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.mipi_panel_init = s6e8ax0_panel_set,
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.mipi_display_on = s6e8ax0_display_enable,
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};
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void s6e8ax0_init(void)
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{
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exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
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}
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