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https://github.com/u-boot/u-boot.git
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d8e8461709
This converts the following to Kconfig: CONFIG_FSL_FIXED_MMC_LOCATION CONFIG_ESDHC_HC_BLK_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
94 lines
2.4 KiB
Plaintext
94 lines
2.4 KiB
Plaintext
CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xEFF40000
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CONFIG_SYS_MALLOC_LEN=0x100000
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
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CONFIG_ENV_ADDR=0xEFF20000
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CONFIG_MPC85xx=y
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CONFIG_TARGET_P1010RDB_PA=y
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CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
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CONFIG_ENABLE_36BIT_PHYS=y
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CONFIG_SYS_MPC85XX_NO_RESETVEC=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_FSL_FIXED_MMC_LOCATION=y
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CONFIG_BOOTDELAY=10
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_BOARD_EARLY_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PBSIZE=276
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CONFIG_CMD_IMLS=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_FLASH=y
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CONFIG_USE_BOOTFILE=y
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CONFIG_BOOTFILE="uImage"
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="eTSEC1"
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CONFIG_DM=y
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CONFIG_FSL_SATA_V2=y
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CONFIG_SYS_SATA_MAX_DEVICE=2
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CONFIG_FSL_CAAM=y
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CONFIG_DDR_CLK_FREQ=66666666
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CONFIG_SYS_SPD_BUS_NUM=1
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CONFIG_CHIP_SELECTS_PER_CTRL=1
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CONFIG_SYS_DDR_RAW_TIMING=y
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CONFIG_COMMON_INIT_DDR=y
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CONFIG_SPL_COMMON_INIT_DDR=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_SYS_I2C_FSL=y
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CONFIG_SYS_FSL_I2C_OFFSET=0x3000
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CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
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CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=10000000
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_PHY_BROADCOM=y
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CONFIG_PHY_DAVICOM=y
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CONFIG_PHY_LXT=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_NATSEMI=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_SMSC=y
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CONFIG_PHY_VITESSE=y
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CONFIG_DM_ETH=y
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CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_PCIE_FSL=y
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CONFIG_DM_RTC=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_ESPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_FSL=y
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