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e67f34f778
The riscv32 toolchain for GCC-12 provided by kernel.org contains libgcc.a compiled for double-float. To link to it we have to adjust how we build U-Boot. As U-Boot actually does not use floating point at all this should not make a significant difference for the produced binaries. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
56 lines
1.3 KiB
Makefile
56 lines
1.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2017 Andes Technology Corporation.
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# Rick Chen, Andes Technology Corporation <rick@andestech.com>
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ifeq ($(CONFIG_ARCH_RV64I),y)
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ARCH_BASE = rv64im
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ABI_BASE = lp64
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endif
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ifeq ($(CONFIG_ARCH_RV32I),y)
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ARCH_BASE = rv32im
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ABI_BASE = ilp32
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endif
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ifeq ($(CONFIG_RISCV_ISA_A),y)
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ARCH_A = a
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endif
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ifeq ($(CONFIG_RISCV_ISA_F),y)
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ARCH_F = f
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endif
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ifeq ($(CONFIG_RISCV_ISA_D),y)
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ARCH_D = d
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ABI_D = d
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endif
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ifeq ($(CONFIG_RISCV_ISA_C),y)
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ARCH_C = c
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endif
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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CMODEL = medlow
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endif
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ifeq ($(CONFIG_CMODEL_MEDANY),y)
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CMODEL = medany
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endif
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RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C)
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ABI = $(ABI_BASE)$(ABI_D)
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# Newer binutils versions default to ISA spec version 20191213 which moves some
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# instructions from the I extension to the Zicsr and Zifencei extensions.
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toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
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ifeq ($(toolchain-need-zicsr-zifencei),y)
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RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
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endif
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ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
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-mcmodel=$(CMODEL)
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PLATFORM_CPPFLAGS += $(ARCH_FLAGS)
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CFLAGS_EFI += $(ARCH_FLAGS)
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head-y := arch/riscv/cpu/start.o
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libs-y += arch/riscv/cpu/
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libs-y += arch/riscv/cpu/$(CPU)/
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libs-y += arch/riscv/lib/
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