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4edb9458b2
Various boards have the wrong Kconfig ordering now. To avoid a misleading diff in the next patch, reorder the configuration correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
28 lines
653 B
Plaintext
28 lines
653 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_DM=y
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CONFIG_DM_GPIO=y
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CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
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CONFIG_SPL=y
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CONFIG_SPL_STACK_R=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_SYS_NS16550=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_DESIGNWARE_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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