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https://github.com/u-boot/u-boot.git
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b6e4c4033c
- add support for the PATI board (MPC555) - add SPI support for the MPC5xx * Patch by Anders Larsen, 08 Dec 2003: add configuration options CONFIG_SERIAL_TAG and CONFIG_REVISION_TAG to pass ATAG_SERIAL and ATAG_REVISION, resp., to the ARM target; cleanup some redundand #defines
208 lines
4.7 KiB
C
208 lines
4.7 KiB
C
/*
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* (C) Copyright 2000-2002 Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation,
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*/
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/*
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* File: interrupt.c
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*
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* Discription: Contains interrupt routines needed by U-Boot
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*
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*/
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#include <common.h>
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#include <command.h>
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#include <mpc5xx.h>
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#include <asm/processor.h>
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#if defined(CONFIG_PATI)
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/* PATI uses IRQs for PCI doorbell */
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#undef NR_IRQS
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#define NR_IRQS 16
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#endif
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struct interrupt_action {
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interrupt_handler_t *handler;
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void *arg;
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int count;
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};
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static struct interrupt_action irq_vecs[NR_IRQS];
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/*
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* Initialise interrupts
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*/
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int interrupt_init_cpu (ulong *decrementer_count)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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int vec;
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/* Decrementer used here for status led */
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*decrementer_count = get_tbclk () / CFG_HZ;
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/* Disable all interrupts */
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immr->im_siu_conf.sc_simask = 0;
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for (vec=0; vec<NR_IRQS; vec++) {
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irq_vecs[vec].handler = NULL;
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irq_vecs[vec].arg = NULL;
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irq_vecs[vec].count = 0;
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}
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return (0);
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}
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/*
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* Handle external interrupts
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*/
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void external_interrupt (struct pt_regs *regs)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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int irq;
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ulong simask, newmask;
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ulong vec, v_bit;
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/*
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* read the SIVEC register and shift the bits down
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* to get the irq number
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*/
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vec = immr->im_siu_conf.sc_sivec;
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irq = vec >> 26;
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v_bit = 0x80000000UL >> irq;
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/*
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* Read Interrupt Mask Register and Mask Interrupts
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*/
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simask = immr->im_siu_conf.sc_simask;
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newmask = simask & (~(0xFFFF0000 >> irq));
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immr->im_siu_conf.sc_simask = newmask;
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if (!(irq & 0x1)) { /* External Interrupt ? */
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ulong siel;
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/*
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* Read Interrupt Edge/Level Register
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*/
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siel = immr->im_siu_conf.sc_siel;
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if (siel & v_bit) { /* edge triggered interrupt ? */
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/*
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* Rewrite SIPEND Register to clear interrupt
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*/
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immr->im_siu_conf.sc_sipend = v_bit;
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}
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}
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if (irq_vecs[irq].handler != NULL) {
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irq_vecs[irq].handler (irq_vecs[irq].arg);
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} else {
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printf ("\nBogus External Interrupt IRQ %d Vector %ld\n",
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irq, vec);
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/* turn off the bogus interrupt to avoid it from now */
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simask &= ~v_bit;
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}
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/*
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* Re-Enable old Interrupt Mask
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*/
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immr->im_siu_conf.sc_simask = simask;
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}
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/*
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* Install and free an interrupt handler
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*/
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void irq_install_handler (int vec, interrupt_handler_t * handler,
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void *arg)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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/* SIU interrupt */
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if (irq_vecs[vec].handler != NULL) {
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printf ("SIU interrupt %d 0x%x\n",
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vec,
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(uint) handler);
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}
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irq_vecs[vec].handler = handler;
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irq_vecs[vec].arg = arg;
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immr->im_siu_conf.sc_simask |= 1 << (31 - vec);
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#if 0
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printf ("Install SIU interrupt for vector %d ==> %p\n",
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vec, handler);
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#endif
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}
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void irq_free_handler (int vec)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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/* SIU interrupt */
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#if 0
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printf ("Free CPM interrupt for vector %d\n",
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vec);
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#endif
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immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec));
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irq_vecs[vec].handler = NULL;
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irq_vecs[vec].arg = NULL;
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}
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/*
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* Timer interrupt - gets called when bit 0 of DEC changes from
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* 0. Decrementer is enabled with bit TBE in TBSCR.
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*/
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void timer_interrupt_cpu (struct pt_regs *regs)
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{
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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#if 0
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printf ("*** Timer Interrupt *** ");
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#endif
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/* Reset Timer Status Bit and Timers Interrupt Status */
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immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
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__asm__ ("nop");
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immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
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return;
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}
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#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
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/*******************************************************************************
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*
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* irqinfo - print information about IRQs
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*
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*/
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int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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int vec;
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printf ("\nInterrupt-Information:\n");
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printf ("Nr Routine Arg Count\n");
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for (vec=0; vec<NR_IRQS; vec++) {
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if (irq_vecs[vec].handler != NULL) {
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printf ("%02d %08lx %08lx %d\n",
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vec,
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(ulong)irq_vecs[vec].handler,
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(ulong)irq_vecs[vec].arg,
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irq_vecs[vec].count);
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}
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}
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return 0;
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}
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#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
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