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4a41a1a6f0
u-boot/drivers/ddr/imx
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Peng Fan 4a41a1a6f0 ddr: imx8m: Add DRAM PLL to generate 1000Mhz output 
We will generate DRAM 4000MT/s as default for i.MX8MP.
So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
..
imx8m ddr: imx8m: Add DRAM PLL to generate 1000Mhz output 2020-01-08 13:20:08 +01:00
Kconfig drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00