mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-27 22:56:49 +08:00
2e95004deb
The core support for NAND booting is there already, so this patch
is pretty straightforward.
There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
o silence make during ln echo
o update documentation
o and avoid:
$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'
by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
106 lines
2.4 KiB
Plaintext
106 lines
2.4 KiB
Plaintext
Freescale MPC8315ERDB Board
|
|
-----------------------------------------
|
|
|
|
1. Board Switches and Jumpers
|
|
|
|
S3 is used to set CONFIG_SYS_RESET_SOURCE.
|
|
|
|
To boot the image at 0xFE000000 in NOR flash, use these DIP
|
|
switch settings for S3 S4:
|
|
|
|
+------+ +------+
|
|
| | | **** |
|
|
| **** | | |
|
|
+------+ ON +------+ ON
|
|
4321 4321
|
|
(where the '*' indicates the position of the tab of the switch.)
|
|
|
|
To boot the image at the beginning of NAND flash, use these
|
|
DIP switch settings for S3 S4:
|
|
|
|
+------+ +------+
|
|
| * | | *** |
|
|
| *** | | * |
|
|
+------+ ON +------+ ON
|
|
4321 4321
|
|
(where the '*' indicates the position of the tab of the switch.)
|
|
|
|
When booting from NAND, use u-boot-nand.bin, not u-boot.bin.
|
|
|
|
2. Memory Map
|
|
The memory map looks like this:
|
|
|
|
0x0000_0000 0x07ff_ffff DDR 128M
|
|
0x8000_0000 0x8fff_ffff PCI MEM 256M
|
|
0x9000_0000 0x9fff_ffff PCI_MMIO 256M
|
|
0xe000_0000 0xe00f_ffff IMMR 1M
|
|
0xe030_0000 0xe03f_ffff PCI IO 1M
|
|
0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K
|
|
0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
|
|
|
|
When booting from NAND, NAND flash is CS0 and NOR flash
|
|
is CS1.
|
|
|
|
3. Definitions
|
|
|
|
3.1 Explanation of NEW definitions in:
|
|
|
|
include/configs/MPC8315ERDB.h
|
|
|
|
CONFIG_MPC83xx MPC83xx family
|
|
CONFIG_MPC831x MPC831x specific
|
|
CONFIG_MPC8315 MPC8315 specific
|
|
CONFIG_MPC8315ERDB MPC8315ERDB board specific
|
|
|
|
4. Compilation
|
|
|
|
Assuming you're using BASH (or similar) as your shell:
|
|
|
|
export CROSS_COMPILE=your-cross-compiler-prefix-
|
|
make distclean
|
|
make MPC8315ERDB_config (or MPC8315ERDB_NAND_config for u-boot-nand.bin)
|
|
make all
|
|
|
|
5. Downloading and Flashing Images
|
|
|
|
5.1 Reflash U-boot Image using U-boot
|
|
|
|
NOR flash:
|
|
|
|
tftp 40000 u-boot.bin
|
|
protect off all
|
|
erase fe000000 fe1fffff
|
|
|
|
cp.b 40000 fe000000 xxxx
|
|
protect on all
|
|
|
|
You have to supply the correct byte count with 'xxxx'
|
|
from the TFTP result log.
|
|
|
|
NAND flash:
|
|
|
|
=>tftpboot $loadaddr <filename>
|
|
=>nand erase 0 0x80000
|
|
=>nand write $loadaddr 0 0x80000
|
|
|
|
...where 0x80000 is the filesize rounded up to
|
|
the next 0x20000 increment.
|
|
|
|
5.2 Downloading and Booting Linux Kernel
|
|
|
|
Ensure that all networking-related environment variables are set
|
|
properly (including ipaddr, serverip, gatewayip (if needed),
|
|
netmask, ethaddr, eth1addr, rootpath (if using NFS root),
|
|
fdtfile, and bootfile).
|
|
|
|
Then, do one of the following, depending on whether you
|
|
want an NFS root or a ramdisk root:
|
|
|
|
=>run nfsboot
|
|
or
|
|
=>run ramboot
|
|
|
|
6 Notes
|
|
|
|
The console baudrate for MPC8315ERDB is 115200bps.
|