Jagan Teki b52a199e32 arm: rockchip: Add common cru.h ... Few of the rockchip family SoC atleast rk3288, rk3399 are sharing some cru register bits so adding common code between these SoC families would require to include both cru include files that indeed resulting function declarations error. So, create a common cru include as cru.h then include the rk3399 arch cru include file and move the common cru register bit definitions into it. The rest of rockchip cru files will add it in future. Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>		2020-01-30 11:44:01 +08:00
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altera	clk: agilex: Add clock driver for Agilex	2020-01-07 14:38:33 +01:00
analogbits	clk: sifive: Sync-up WRPLL library with upstream Linux	2019-07-19 14:24:51 +08:00
aspeed	aspeed: ast2500: Read clock ofdata in the correct method	2020-01-07 16:02:38 -07:00
at91	ARM: at91: Rename sama5_sfr.h to at91_sfr.h	2019-10-08 09:16:11 +03:00
exynos	clk: Remove DM_FLAG_PRE_RELOC flag in various drivers	2018-11-14 09:16:28 -08:00
imx	clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()	2020-01-26 21:57:08 +01:00
mediatek	clk: mediatek: use unsigned type for returning the clk rate	2020-01-26 12:03:06 +01:00
meson	clk: meson-sm1: add compatible	2019-10-18 14:26:59 +02:00
mtmips	clk: add clock driver for MediaTek MT76x8 platform	2019-10-25 17:20:44 +02:00
mvebu	clk: armada-37xx-periph: Support changing clock parent and rate	2018-09-19 08:59:26 +02:00
owl	clk: Remove DM_FLAG_PRE_RELOC flag in various drivers	2018-11-14 09:16:28 -08:00
renesas	clk: renesas: Add R8A77980 V3H clock tables	2019-08-09 23:15:01 +02:00
rockchip	arm: rockchip: Add common cru.h	2020-01-30 11:44:01 +08:00
sifive	clk: sifive: Drop GEMGXL clock driver	2019-07-19 14:24:51 +08:00
sunxi	sunxi: clocks: Add H6 USB clock gates and resets	2019-07-16 17:13:15 +05:30
tegra	drivers: cosmetic: Convert SPDX license tags to Linux Kernel style	2018-10-28 09:26:39 -04:00
uniphier	clk: uniphier: add EMMC clock for LD11, LD20, and PXs3	2019-07-10 22:41:55 +09:00
clk_bcm6345.c	clk: bcm6345: convert to use live dt	2018-06-01 15:56:02 +02:00
clk_boston.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
clk_fixed_factor.c	clk: Remove clock ID check in .get_rate() of clk_fixed_*	2019-07-19 14:50:30 +02:00
clk_fixed_rate.c	clk: fixed_rate: add dummy enable() function	2020-01-16 09:39:45 -05:00
clk_pic32.c	common: Move get_tbclk() to time.h	2020-01-17 13:27:30 -05:00
clk_sandbox_ccf.c	sandbox: clk: add clk enable/disable test code	2019-08-22 00:10:09 +02:00
clk_sandbox_test.c	test: clk: Update tests to also check the managed API	2019-10-22 16:14:05 +02:00
clk_sandbox.c	test: clk: test clock self assignment	2019-10-22 16:14:05 +02:00
clk_stm32f.c	clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock	2018-05-08 09:07:34 -04:00
clk_stm32h7.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
clk_stm32mp1.c	clk: stm32mp1: Add a clock entry for RNG1 device	2020-01-07 18:08:21 +01:00
clk_versal.c	arm64: versal: Rename versal_pm_request to xilinx_pm_request	2019-10-24 13:37:01 +02:00
clk_vexpress_osc.c	misc: Update read() and write() methods to return bytes xfered	2018-11-20 19:14:22 -07:00
clk_zynq.c	ARM: zynq: Add missing i2c get_rate for fixing i2c SPL	2019-04-16 11:51:34 +02:00
clk_zynqmp.c	arm64: zynqmp: Switch to xlnx-zynqmp-clk header	2019-10-24 13:37:02 +02:00
clk-cdce9xx.c	clk: cdce9xx: add support for cdce9xx clock synthesizer	2019-10-11 13:32:39 -04:00
clk-composite.c	clk: add composite clk support	2019-07-31 09:20:51 +02:00
clk-divider.c	clk: divider set rate supporrt	2019-07-31 09:20:51 +02:00
clk-fixed-factor.c	clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)	2019-07-19 14:50:30 +02:00
clk-gate.c	clk: gate: support sandbox	2019-07-31 09:20:51 +02:00
clk-hsdk-cgu.c	Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR	2018-04-27 14:54:48 -04:00
clk-mux.c	clk: mux: add set parent support	2019-07-31 09:20:51 +02:00
clk-ti-sci.c	clk: sci-clk: add slack to clk-set-rate passed to firmware	2020-01-20 10:10:29 +05:30
clk-uclass.c	clk: uclass: clk_get_by_name() must not be available if CONFIG_OF_PLATDATA is enabled	2020-01-26 12:03:06 +01:00
clk.c	clk: show more error info when uclass_get_device_by_name	2020-01-26 12:03:06 +01:00
ics8n3qv01.c	clk: Add ICS8N3QV01 driver	2018-05-08 18:50:23 -04:00
Kconfig	clk: cdce9xx: add support for cdce9xx clock synthesizer	2019-10-11 13:32:39 -04:00
Makefile	clk: add clock driver for MediaTek MT76x8 platform	2019-10-25 17:20:44 +02:00
mpc83xx_clk.c	common: Move clock functions into a new file	2020-01-17 13:27:29 -05:00
mpc83xx_clk.h	clk: Add MPC83xx clock driver	2018-09-18 00:01:18 -06:00