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7f6a6db638
Development board for headless gateway platform from Abilis Systems. Initial commit with working UART and DW GMAC. For now with generic Ethernet PHY due to problems in Realtek PHY driver. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Christian Ruppert <christian.ruppert@abilis.com> Cc: Pierrick Hascoet <pierrick.hascoet@abilis.com>
24 lines
375 B
C
24 lines
375 B
C
/*
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* (C) Copyright 2014 Pierrick Hascoet, Abilis Systems
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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void reset_cpu(ulong addr)
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{
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#define CRM_SWRESET 0xff101044
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writel(0x1, (void *)CRM_SWRESET);
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}
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int board_eth_init(bd_t *bis)
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{
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if (designware_initialize(ETH0_BASE_ADDRESS, 0) >= 0)
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return 1;
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return 0;
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}
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