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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
154 lines
3.9 KiB
C
154 lines
3.9 KiB
C
/*
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* Copyright 2009-2012 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FM_ETH_H__
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#define __FM_ETH_H__
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#include <common.h>
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#include <asm/types.h>
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#include <asm/fsl_enet.h>
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enum fm_port {
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FM1_DTSEC1,
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FM1_DTSEC2,
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FM1_DTSEC3,
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FM1_DTSEC4,
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FM1_DTSEC5,
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FM1_DTSEC6,
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FM1_DTSEC9,
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FM1_DTSEC10,
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FM1_10GEC1,
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FM1_10GEC2,
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FM2_DTSEC1,
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FM2_DTSEC2,
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FM2_DTSEC3,
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FM2_DTSEC4,
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FM2_DTSEC5,
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FM2_DTSEC6,
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FM2_DTSEC9,
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FM2_DTSEC10,
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FM2_10GEC1,
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FM2_10GEC2,
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NUM_FM_PORTS,
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};
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enum fm_eth_type {
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FM_ETH_1G_E,
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FM_ETH_10G_E,
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};
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#ifdef CONFIG_SYS_FMAN_V3
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#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfc000)
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#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000)
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#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfc000)
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#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfd000)
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#else
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#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xe1120)
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#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xf1000)
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#endif
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#define DEFAULT_FM_MDIO_NAME "FSL_MDIO0"
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#define DEFAULT_FM_TGEC_MDIO_NAME "FM_TGEC_MDIO"
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/* Fman ethernet info struct */
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#define FM_ETH_INFO_INITIALIZER(idx, pregs) \
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.fm = idx, \
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.phy_regs = (void *)pregs, \
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.enet_if = PHY_INTERFACE_MODE_NONE, \
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#ifdef CONFIG_SYS_FMAN_V3
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#define FM_DTSEC_INFO_INITIALIZER(idx, n) \
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{ \
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FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC_MDIO_ADDR) \
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.index = idx, \
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.num = n - 1, \
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.type = FM_ETH_1G_E, \
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.port = FM##idx##_DTSEC##n, \
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.rx_port_id = RX_PORT_1G_BASE + n - 1, \
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.tx_port_id = TX_PORT_1G_BASE + n - 1, \
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.compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
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offsetof(struct ccsr_fman, memac[n-1]),\
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}
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#define FM_TGEC_INFO_INITIALIZER(idx, n) \
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{ \
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FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR) \
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.index = idx, \
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.num = n - 1, \
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.type = FM_ETH_10G_E, \
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.port = FM##idx##_10GEC##n, \
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.rx_port_id = RX_PORT_10G_BASE + n - 1, \
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.tx_port_id = TX_PORT_10G_BASE + n - 1, \
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.compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
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offsetof(struct ccsr_fman, memac[n-1+8]),\
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}
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#else
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#define FM_DTSEC_INFO_INITIALIZER(idx, n) \
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{ \
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FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR) \
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.index = idx, \
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.num = n - 1, \
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.type = FM_ETH_1G_E, \
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.port = FM##idx##_DTSEC##n, \
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.rx_port_id = RX_PORT_1G_BASE + n - 1, \
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.tx_port_id = TX_PORT_1G_BASE + n - 1, \
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.compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
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offsetof(struct ccsr_fman, mac_1g[n-1]),\
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}
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#define FM_TGEC_INFO_INITIALIZER(idx, n) \
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{ \
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FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
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.index = idx, \
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.num = n - 1, \
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.type = FM_ETH_10G_E, \
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.port = FM##idx##_10GEC##n, \
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.rx_port_id = RX_PORT_10G_BASE + n - 1, \
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.tx_port_id = TX_PORT_10G_BASE + n - 1, \
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.compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
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offsetof(struct ccsr_fman, mac_10g[n-1]),\
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}
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#endif
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struct fm_eth_info {
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u8 enabled;
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u8 fm;
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u8 num;
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u8 phy_addr;
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int index;
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u16 rx_port_id;
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u16 tx_port_id;
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enum fm_port port;
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enum fm_eth_type type;
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void *phy_regs;
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phy_interface_t enet_if;
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u32 compat_offset;
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struct mii_dev *bus;
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};
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struct tgec_mdio_info {
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struct tgec_mdio_controller *regs;
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char *name;
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};
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struct memac_mdio_info {
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struct memac_mdio_controller *regs;
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char *name;
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};
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int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info);
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int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info);
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int fm_standard_init(bd_t *bis);
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void fman_enet_init(void);
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void fdt_fixup_fman_ethernet(void *fdt);
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phy_interface_t fm_info_get_enet_if(enum fm_port port);
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void fm_info_set_phy_address(enum fm_port port, int address);
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int fm_info_get_phy_address(enum fm_port port);
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void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
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void fm_disable_port(enum fm_port port);
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#endif
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