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70672a2959
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
33 lines
713 B
C
33 lines
713 B
C
/*
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* P4080 DS board configuration file
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* Also supports P4040 DS
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*/
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#define CONFIG_P4080DS
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#define CONFIG_PHYS_64BIT
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#define CONFIG_PPC_P4080
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#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
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#define CONFIG_MMC
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#define CONFIG_PCIE3
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#define CONFIG_CMD_SATA
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#define CONFIG_SATA_SIL
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#define CONFIG_SYS_SATA_MAX_DEVICE 2
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#define CONFIG_LIBATA
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#define CONFIG_LBA48
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#define CONFIG_SYS_SRIO
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#define CONFIG_SRIO1 /* SRIO port 1 */
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#define CONFIG_SRIO2 /* SRIO port 2 */
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#define CONFIG_SRIO_PCIE_BOOT_MASTER
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#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */
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#include "corenet_ds.h"
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