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3f2b4d7220
Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART Log as below: I would keep some debug info for now, and after we move to be stable and production launch, we could drop that. U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) Normal Boot upower_init: soc_id=48 upower_init: version:11.11.6 upower_init: start uPower RAM service user_upwr_rdy_callb: soc=b user_upwr_rdy_callb: RAM version:12.6 Turn on switches ok Turn on memories ok Clear DDR retention ok Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F0 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. complete De-Skew PLL is locked and ready WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x3a800 by ROM_API NOTICE: BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94 NOTICE: BL31: Built : 01:56:58, Jun 29 2021 NOTICE: upower_init: start uPower RAM service NOTICE: user_upwr_rdy_callb: soc=b NOTICE: user_upwr_rdy_callb: RAM version:12.6 U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) CPU: Freescale i.MX8ULP rev1.0 at 744 MHz Reset cause: POR Boot mode: Single boot Model: FSL i.MX8ULP EVK DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@293a0000 Out: serial@293a0000 Err: serial@293a0000 Net: Warning: ethernet@29950000 (eth0) using random MAC address - 96:35:88:62:e0:44 eth0: ethernet@29950000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
104 lines
2.1 KiB
Plaintext
104 lines
2.1 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_IMX8ULP=y
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CONFIG_SYS_TEXT_BASE=0x80200000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_DM_GPIO=y
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CONFIG_TARGET_IMX8ULP_EVK=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL=y
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CONFIG_SPL_TEXT_BASE=0x22020000
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CONFIG_SPL_LOAD_IMX_CONTAINER=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_BOOTDELAY=0
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CONFIG_DEFAULT_FDT_FILE="imx8ulp-evk"
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_SEPARATE_BSS=y
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#CONFIG_SPL_RAM_SUPPORT=y
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#CONFIG_SPL_RAM_DEVICE=y
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#CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
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CONFIG_HUSH_PARSER=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="imx8ulp-evk"
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CONFIG_SPL_DM=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_IMX_LPI2C=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX8ULP=y
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CONFIG_DM_SERIAL=y
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CONFIG_FSL_LPUART=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_FSL_USDHC=y
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CONFIG_CMD_MMC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_MISC=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTCOMMAND="run distro_bootcmd;run bsp_bootcmd"
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CONFIG_CMD_I2C=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_READ=y
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CONFIG_BAUDRATE=115200
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0x400000
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CONFIG_ENV_SECT_SIZE=0x10000
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CONFIG_SYS_MMC_ENV_DEV=0
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CONFIG_ULP_WATCHDOG=y
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CONFIG_SPL_WATCHDOG=y
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CONFIG_CMD_SF=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_DM_SPI=y
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CONFIG_NXP_FSPI=y
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CONFIG_SPI=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SF_DEFAULT_BUS=0
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CONFIG_SF_DEFAULT_CS=0
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CONFIG_SF_DEFAULT_SPEED=40000000
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_IMX_RGPIO2P=y
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CONFIG_USE_ARCH_MEMCPY=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ8XXX=y
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CONFIG_DM_ETH=y
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CONFIG_FEC_MXC=y
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CONFIG_MII=y
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CONFIG_CMD_NET=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_EFI_PARTITION=y
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CONFIG_DM_PCA953X=y
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