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Current codes assume the OPTEE address is at the end of first DRAM bank. Adjust the process to allow OPTEE in the middle of first bank. When OPTEE memory is removed from first bank, it may split the first bank to two banks, adjust the MMU table for the split case, Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge i.MX8MP evk to default to avoid issue. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Tested-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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.. | ||
Kconfig | ||
lpddr4_timing_1gb.c | ||
lpddr4_timing_2gb.c | ||
lpddr4_timing_3gb.c | ||
lpddr4_timing_4gb.c | ||
lpddr4_timing.h | ||
MAINTAINERS | ||
Makefile | ||
pico-imx8mq.c | ||
README | ||
spl.c |
U-Boot for the Technexion Pico i.MX8MQ Quick Start =========== - Build the TFA binary - Get DDR and HDMI firmware - Build U-Boot - Boot Get and Build the TFA blob ========================== Note: srctree is U-Boot source directory Get ATF from: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git branch: master $ CROSS_COMPILE=aarch64-linux-gnu- make PLAT=imx8mq bl31 $ cp build/imx8mq/release/bl31.bin $(builddir) Get the DDR and HDMI firmware ============================= $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin $ chmod +x firmware-imx-7.9.bin $ ./firmware-imx-7.9.bin # Or use this to avoid running random scripts from the internet, # but note that you must agree to the license the script displays: # $ dd if=firmware-imx-7.9.bin of=firmware-imx-7.9.tar.bz2 bs=38868 skip=1 # $ tar -xf firmware-imx-7.9.tar.bz2 $ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir) $ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir) Build U-Boot ============ $ export CROSS_COMPILE=aarch64-poky-linux- $ make pico-imx8mq_defconfig $ make flash.bin Burn the flash.bin to MicroSD card offset 33KB $ dd if=flash.bin of=/dev/mmcblkX bs=1024 seek=33 Or into eMMC from a running system $ dhcp flash.bin && mmc write $loadaddr 0x42 0x800 Boot ==== "o" denotes a pin "[]" denotes two pins bridged by a jumper eMMC boot: J1 o[] []o J2 []o o[] USB upload via USB-C connector: J1 ooo ooo J2 o[] []o