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c2ae7d8220
Move the SPL settings into common/spl where most of the SPL code is kept. Signed-off-by: Simon Glass <sjg@chromium.org>
27 lines
827 B
Plaintext
27 lines
827 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_MACH_SUN6I=y
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CONFIG_DRAM_CLK=240
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CONFIG_DRAM_ZQ=251
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CONFIG_USB1_VBUS_PIN=""
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CONFIG_I2C0_ENABLE=y
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CONFIG_AXP_GPIO=y
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CONFIG_VIDEO_LCD_MODE="x:2048,y:1536,depth:24,pclk_khz:208000,le:5,ri:150,up:9,lo:24,hs:5,vs:1,sync:3,vmode:0"
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CONFIG_VIDEO_LCD_DCLK_PHASE=0
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CONFIG_VIDEO_LCD_POWER="PH27"
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CONFIG_VIDEO_LCD_BL_EN="PM1"
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CONFIG_VIDEO_LCD_BL_PWM="PH13"
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CONFIG_VIDEO_LCD_PANEL_I2C_SDA="PA23"
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CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
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CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
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CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
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CONFIG_SPL=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_AXP_ALDO1_VOLT=3300
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CONFIG_USB_EHCI_HCD=y
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